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Extract from the Register of European Patents

EP About this file: EP3180803

EP3180803 - SELF-ALIGNED GATE LAST III-N TRANSISTORS [Right-click to bookmark this link]
StatusThe application has been withdrawn
Status updated on  12.07.2019
Database last updated on 02.11.2024
FormerRequest for examination was made
Status updated on  19.05.2017
FormerThe international publication has been made
Status updated on  13.01.2017
Most recent event   Tooltip12.07.2019Withdrawal of applicationpublished on 14.08.2019  [2019/33]
Applicant(s)For all designated states
Intel Corporation
2200 Mission College Boulevard
Santa Clara, CA 95054 / US
[2017/25]
Inventor(s)01 / THEN, Han Wui
c/o Intel Corporation
2200 Mission College Boulevard
M/S: RNB4-150
Santa Clara, CA 95054 / US
02 / DASGUPTA, Sansaptak
132 NE Greenridge Terrace
Hillsboro, Oregon 97124 / US
03 / SUNG, Seung Moon
2459 NW Parnell Terrace
Portland, Oregon 97229 / US
04 / GARDNER, Sanaz
19920 NW Cornwall Lane
Hillsboro, Oregon 97124 / US
05 / RADOSAVLJEVIC, Marko
c/o Intel Corporation
2200 Mission College Boulevard
M/S: RNB4-150
Santa Clara, CA 95054 / US
06 / CHAU, Robert
8875 SW 171st Avenue
Beaverton, Oregon 97007 / US
 [2017/25]
Representative(s)Goddar, Heinz J., et al
Boehmert & Boehmert
Anwaltspartnerschaft mbB
Pettenkoferstrasse 22
80336 München / DE
[N/P]
Former [2017/25]Goddar, Heinz J., et al
Boehmert & Boehmert
Anwaltspartnerschaft mbB
Patentanwälte Rechtsanwälte
Pettenkoferstrasse 20-22
80336 München / DE
Application number, filing date14899711.713.08.2014
[2017/25]
WO2014US50826
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report
No.:WO2016024960
Date:18.02.2016
Language:EN
[2016/07]
Type: A1 Application with search report 
No.:EP3180803
Date:21.06.2017
Language:EN
The application published by WIPO in one of the EPO official languages on 18.02.2016 takes the place of the publication of the European patent application.
[2017/25]
Search report(s)International search report - published on:KR18.02.2016
(Supplementary) European search report - dispatched on:EP12.03.2018
ClassificationIPC:H01L29/778, H01L21/336, H01L21/338, H01L21/285, // H01L29/08, H01L29/423, H01L29/20
[2018/15]
CPC:
H01L29/401 (EP,US); H01L29/7786 (EP,KR,US); H01L29/41783 (US);
H01L21/28587 (EP,KR,US); H01L29/0843 (EP,KR,US); H01L29/2003 (EP,KR,US);
H01L29/205 (US); H01L29/42376 (EP,KR,US); H01L29/66462 (EP,KR,US);
H01L29/7787 (US); H01L29/4236 (EP,US) (-)
Former IPC [2017/25]H01L29/778
Designated contracting statesAL,   AT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   LV,   MC,   MK,   MT,   NL,   NO,   PL,   PT,   RO,   RS,   SE,   SI,   SK,   SM,   TR [2017/25]
TitleGerman:SELBSTAUSGERICHTETE GATE-LAST-III-N-TRANSISTOREN[2017/25]
English:SELF-ALIGNED GATE LAST III-N TRANSISTORS[2017/25]
French:TRANSISTORS À BASE DE MATÉRIAUX III-N À AUTO-ALIGNEMENT DE GRILLE EN DERNIER[2017/25]
Entry into regional phase11.01.2017National basic fee paid 
11.01.2017Search fee paid 
11.01.2017Designation fee(s) paid 
11.01.2017Examination fee paid 
Examination procedure11.01.2017Examination requested  [2017/25]
11.01.2017Date on which the examining division has become responsible
28.09.2018Amendment by applicant (claims and/or description)
08.07.2019Application withdrawn by applicant  [2019/33]
Fees paidRenewal fee
11.01.2017Renewal fee patent year 03
14.08.2017Renewal fee patent year 04
10.08.2018Renewal fee patent year 05
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Documents cited:Search[XI]US2006124962  (UEDA TETSUZO [JP], et al) [X] 1-3,6,7 * figures 5, 7 and associated text * [I] 4,5,8,13-15;
 [XI]  - K SHINOHARA ET AL, "220GHz fT and 400GHz fmax in 40-nm GaN DH-HEMTs with re-grown ohmic", 2012 INTERNATIONAL ELECTRON DEVICES MEETING, (2010), doi:10.1109/IEDM.2010.5703448, ISSN 0163-1918, ISBN 978-1-4673-4870-6, pages 30.1.1 - 30.1.4, XP055445718 [X] 1-3,6,7 * figure 1 * [I] 4,5,8,13-15

DOI:   http://dx.doi.org/10.1109/IEDM.2010.5703448
 [XI]  - ANCONA M G, "Fully coupled thermoelectroelastic simulations of GaN devices", 2012 INTERNATIONAL ELECTRON DEVICES MEETING (IEDM 2012) : SAN FRANCISCO, CALIFORNIA, USA, 10 - 13 DECEMBER 2012, IEEE, PISCATAWAY, NJ, (20121210), doi:10.1109/IEDM.2012.6479037, ISBN 978-1-4673-4872-0, pages 13.5.1 - 13.5.4, XP032341729 [X] 1,2,4,6,7 * figure 1b * [I] 3,8,13-15

DOI:   http://dx.doi.org/10.1109/IEDM.2012.6479037
International search[A]US7259049  (CHAN KEVIN K [US], et al) [A] 1-25 * See column 4, lines 39-67 and figure 1. *;
 [A]US2007293015  (BEACH ROBERT [US], et al) [A] 1-25 * See paragraphs [0019]-[0025] and figure 1. *;
 [A]US2010330754  (HEBERT FRANCOIS [US]) [A] 1-25* See paragraphs [0012]-[0021] and figures 1-13. *;
 [Y]EP1726043  (POWER INTEGRATIONS INC [US]) [Y] 1-25 * See paragraphs [0021]-[0027], claim 9 and figures 2A-3. *;
 [Y]US2013320350  (HAEBERLEN OLIVER [AT], et al) [Y] 1-25 * See paragraphs [0017]-[0022] and figure 1. *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.