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Extract from the Register of European Patents

EP About this file: EP3218827

EP3218827 - HETEROGENEOUS MULTIPROCESSOR PROGRAM COMPILATION TARGETING PROGRAMMABLE INTEGRATED CIRCUITS [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  03.04.2021
Database last updated on 25.09.2024
FormerThe patent has been granted
Status updated on  24.04.2020
FormerGrant of patent is intended
Status updated on  07.01.2020
FormerRequest for examination was made
Status updated on  18.08.2017
FormerThe international publication has been made
Status updated on  09.05.2017
Most recent event   Tooltip15.07.2022Lapse of the patent in a contracting state
New state(s): BE		published on 17.08.2022  [2022/33]
Applicant(s)For all designated states
Xilinx, Inc.
2100 Logic Drive
San Jose, California 95124 / US
[2017/38]
Inventor(s)01 / STYLES, Henry, E.
2100 Logic Drive
San Jose, CA 95124 / US
02 / FIFIELD, Jeffrey, M.
2100 Logic Drive
San Jose, CA 95124 / US
03 / WITTIG, Ralph, D.
2100 Logic Drive
San Jose, CA 95124 / US
04 / JAMES-ROXBY, Philip, B.
2100 Logic Drive
San Jose, CA 95124 / US
05 / SANTAN, Sonal
2100 Logic Drive
San Jose, CA 95124 / US
06 / VARMA, Devadas
2100 Logic Drive
San Jose, CA 95124 / US
07 / MARTINEZ VALLINA, Fernando, J.
2100 Logic Drive
San Jose, CA 95124 / US
08 / ZHOU, Sheng
2100 Logic Drive
San Jose, CA 95124 / US
09 / LO, Kwok-wah
2100 Logic Drive
San Jose, CA 95124 / US
 [2017/38]
Representative(s)McGlashan, Graham Stewart
Marks & Clerk LLP The Beacon
176 St Vincent Street
Glasgow G2 5SG / GB
[N/P]
Former [2017/38]McGlashan, Graham Stewart
Marks & Clerk LLP
Aurora
120 Bothwell Street
Glasgow G2 7JS / GB
Application number, filing date15801565.110.11.2015
[2017/38]
WO2015US60025
Priority number, dateUS20141453998512.11.2014         Original published format: US201414539985
US20141453997512.11.2014         Original published format: US201414539975
[2017/38]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report
No.:WO2016077393
Date:19.05.2016
Language:EN
[2016/20]
Type: A1 Application with search report 
No.:EP3218827
Date:20.09.2017
Language:EN
The application published by WIPO in one of the EPO official languages on 19.05.2016 takes the place of the publication of the European patent application.
[2017/38]
Type: B1 Patent specification 
No.:EP3218827
Date:27.05.2020
Language:EN
[2020/22]
Search report(s)International search report - published on:EP19.05.2016
ClassificationIPC:G06F17/50, G06F15/78
[2017/38]
CPC:
G06F30/34 (EP,CN,KR); G06F2115/10 (EP,CN,KR)
Designated contracting statesAL,   AT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   LV,   MC,   MK,   MT,   NL,   NO,   PL,   PT,   RO,   RS,   SE,   SI,   SK,   SM,   TR [2017/38]
Extension statesBANot yet paid
MENot yet paid
Validation statesMANot yet paid
MDNot yet paid
TitleGerman:HETEROGENE, AUF PROGRAMMIERBARE INTEGRIERTE SCHALTUNGEN ABZIELENDE MULTIPROZESSORPROGRAMMKOMPILIERUNG[2017/38]
English:HETEROGENEOUS MULTIPROCESSOR PROGRAM COMPILATION TARGETING PROGRAMMABLE INTEGRATED CIRCUITS[2017/38]
French:COMPILATION DE PROGRAMMES À MULTIPROCESSEUR HÉTÉROGÈNE CIBLANT DES CIRCUITS INTÉGRÉS PROGRAMMABLES[2017/38]
Entry into regional phase08.05.2017National basic fee paid 
08.05.2017Designation fee(s) paid 
08.05.2017Examination fee paid 
Examination procedure18.08.2016Request for preliminary examination filed
International Preliminary Examining Authority: EP
08.05.2017Examination requested  [2017/38]
08.05.2017Date on which the examining division has become responsible
29.12.2017Amendment by applicant (claims and/or description)
08.01.2020Communication of intention to grant the patent
15.04.2020Fee for grant paid
15.04.2020Fee for publishing/printing paid
15.04.2020Receipt of the translation of the claim(s)
Opposition(s)02.03.2021No opposition filed within time limit [2021/18]
Fees paidRenewal fee
27.11.2017Renewal fee patent year 03
27.11.2018Renewal fee patent year 04
27.11.2019Renewal fee patent year 05
Opt-out from the exclusive  Tooltip
competence of the Unified
Patent Court		 See the Register of the Unified Patent Court for opt-out data
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition  TooltipHU10.11.2015
AL27.05.2020
AT27.05.2020
CY27.05.2020
CZ27.05.2020
DK27.05.2020
EE27.05.2020
ES27.05.2020
FI27.05.2020
HR27.05.2020
IT27.05.2020
LT27.05.2020
LV27.05.2020
MC27.05.2020
MK27.05.2020
MT27.05.2020
NL27.05.2020
PL27.05.2020
RO27.05.2020
RS27.05.2020
SE27.05.2020
SI27.05.2020
SK27.05.2020
SM27.05.2020
TR27.05.2020
BG27.08.2020
NO27.08.2020
GR28.08.2020
IS27.09.2020
PT28.09.2020
LU10.11.2020
BE30.11.2020
CH30.11.2020
LI30.11.2020
[2022/33]
Former [2022/32]HU10.11.2015
AL27.05.2020
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CY27.05.2020
CZ27.05.2020
DK27.05.2020
EE27.05.2020
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FI27.05.2020
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IT27.05.2020
LT27.05.2020
LV27.05.2020
MC27.05.2020
MK27.05.2020
MT27.05.2020
NL27.05.2020
PL27.05.2020
RO27.05.2020
RS27.05.2020
SE27.05.2020
SI27.05.2020
SK27.05.2020
SM27.05.2020
TR27.05.2020
BG27.08.2020
NO27.08.2020
GR28.08.2020
IS27.09.2020
PT28.09.2020
LU10.11.2020
CH30.11.2020
LI30.11.2020
Former [2022/27]HU10.11.2015
AL27.05.2020
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CZ27.05.2020
DK27.05.2020
EE27.05.2020
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FI27.05.2020
HR27.05.2020
IT27.05.2020
LT27.05.2020
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MC27.05.2020
MT27.05.2020
NL27.05.2020
PL27.05.2020
RO27.05.2020
RS27.05.2020
SE27.05.2020
SI27.05.2020
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SM27.05.2020
TR27.05.2020
BG27.08.2020
NO27.08.2020
GR28.08.2020
IS27.09.2020
PT28.09.2020
LU10.11.2020
CH30.11.2020
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Former [2021/37]AL27.05.2020
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EE27.05.2020
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IT27.05.2020
LT27.05.2020
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MC27.05.2020
NL27.05.2020
PL27.05.2020
RO27.05.2020
RS27.05.2020
SE27.05.2020
SI27.05.2020
SK27.05.2020
SM27.05.2020
BG27.08.2020
NO27.08.2020
GR28.08.2020
IS27.09.2020
PT28.09.2020
LU10.11.2020
CH30.11.2020
LI30.11.2020
Former [2021/33]AL27.05.2020
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CZ27.05.2020
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EE27.05.2020
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FI27.05.2020
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IT27.05.2020
LT27.05.2020
LV27.05.2020
MC27.05.2020
NL27.05.2020
PL27.05.2020
RO27.05.2020
RS27.05.2020
SE27.05.2020
SI27.05.2020
SK27.05.2020
SM27.05.2020
BG27.08.2020
NO27.08.2020
GR28.08.2020
IS27.09.2020
PT28.09.2020
LU10.11.2020
Former [2021/31]AL27.05.2020
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IT27.05.2020
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LV27.05.2020
MC27.05.2020
NL27.05.2020
PL27.05.2020
RO27.05.2020
RS27.05.2020
SE27.05.2020
SI27.05.2020
SK27.05.2020
SM27.05.2020
BG27.08.2020
NO27.08.2020
GR28.08.2020
IS27.09.2020
PT28.09.2020
Former [2021/24]AL27.05.2020
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CZ27.05.2020
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EE27.05.2020
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IT27.05.2020
LT27.05.2020
LV27.05.2020
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PL27.05.2020
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SI27.05.2020
SK27.05.2020
SM27.05.2020
BG27.08.2020
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LV27.05.2020
NL27.05.2020
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RS27.05.2020
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SM27.05.2020
BG27.08.2020
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IS27.09.2020
PT28.09.2020
Former [2021/08]AL27.05.2020
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HR27.05.2020
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RS27.05.2020
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Former [2021/01]FI27.05.2020
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Former [2020/48]FI27.05.2020
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Former [2020/47]LT27.05.2020
NO27.08.2020
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Former [2020/46]IS27.09.2020
Cited inInternational search[XI]US2013212365  (CHEN DORIS TZU-LANG [CA], et al) [X] 1,2,8,9 * abstract * * paragraph [0001] * * paragraph [0007] - paragraph [0009] * * paragraph [0025] - paragraph [0041] * * paragraph [0057] - paragraph [0063] * [I] 3-7,10-15;
 [XI]  - ALEXANDROS BARTZAS ET AL, A Methodology for Efficient Use of OpenCL, ESL and FPGAs in Multi-core Architectures, EURO-PAR 2012: PARALLEL PROCESSING WORKSHOPS, SPRINGER BERLIN HEIDELBERG, BERLIN, HEIDELBERG, PAGE(S) 507 - 517, (20120827), pages 507 - 517, ISBN 978-3-642-36948-3, XP047031078 [X] 1,2,8,9 * abstract * * page 507 - page 509 * * page 511 * [I] 3-7,10-15

DOI:   http://dx.doi.org/10.1007/978-3-642-36949-0_59
 [A]  - TOMASZ S CZAJKOWSKI ET AL, "From opencl to high-performance hardware on FPGAS", FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL), 2012 22ND INTERNATIONAL CONFERENCE ON, IEEE, (20120829), doi:10.1109/FPL.2012.6339272, ISBN 978-1-4673-2257-7, pages 531 - 534, XP032265186 [A] 1-15 * the whole document *

DOI:   http://dx.doi.org/10.1109/FPL.2012.6339272
 [A]  - KAVYA SHAGRITHAYA ET AL, "Enabling development of OpenCL applications on FPGA platforms", APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP), 2013 IEEE 24TH INTERNATIONAL CONFERENCE ON, IEEE, (20130605), doi:10.1109/ASAP.2013.6567546, ISBN 978-1-4799-0494-5, pages 26 - 30, XP032441593 [A] 1-15 * the whole document *

DOI:   http://dx.doi.org/10.1109/ASAP.2013.6567546
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