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EP3986050
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Extract from the Register of European Patents
EP Citations: EP3986050
| Cited in | International search | Type: | Patent literature | Publication No.: | US2019090199
[A] (KIM KI-TAE [KR], et al) [A] 1-6* , Whole document *; | Type: | Patent literature | Publication No.: | EP3468061
[Y] (PANASONIC IP CORP AMERICA [US]) [Y] 1-6 * , [0002]-[0095] *; | Type: | Non-patent literature | Publication information: | [Y] - INTEL CORPORATION, "Email Discussion Summary on New NR SI Proposal: Study on NR design above 52.6GHz", 3GPP TSG RAN #80 RP-180929, (20180614), XP051510831 [Y] 1-6 * , section 4 * | Type: | Non-patent literature | Publication information: | [Y] - Intel Corporation, "On the remaining details of DM-RS", 3GPP TSG RAN WG1 #91 R1-1720076, (20171201), XP051369757 [Y] 2-5 * , section 2 * | Type: | Non-patent literature | Publication information: | [Y] - Spreadtrum Communications,, "Discussion on cross-slot scheduling for UE power saving", 3GPP TSG RAN WG1 #97 R1-1906372, (20190517), XP051708407 [Y] 5 * , section 2. 1.3 * | Type: | Non-patent literature | Publication information: | [A] - Huawei; HiSilicon, "Discussion on DMRS sequence design for low PAPR", 3GPP TSG RAN WG1 #96b R1-1903973, (20190412), XP051691195 [A] 1-6 * , Whole document * | Type: | Non-patent literature | Publication information: | [A] - ZTE, Sanechips, "Remaining issues on NR-PDCCH structure", 3GPP TSG RAN WG1 #91 R1-1719489, (20171201), XP051368797 [A] 1-6 * , Whole document * | Type: | Non-patent literature | Publication information: | [A] - ERICSSON, "NR-U PUCCH Design", 3GPP TSG RAN WG1 #93 R1-1806261, (20180525), XP051441469 [A] 1-6 * , Whole document * |