| EP3767683 - HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) AND FORMING METHOD THEREOF [Right-click to bookmark this link] | Status | Examination is in progress Status updated on 02.12.2022 Database last updated on 10.03.2026 | |
| Former | Request for examination was made Status updated on 23.07.2021 | ||
| Former | The application has been published Status updated on 18.12.2020 | Most recent event Tooltip | 16.04.2025 | New entry: Renewal fee paid | Applicant(s) | For all designated states United Microelectronics Corp. No.3, Li-Hsin Road 2 Science-Based Industrial Park Hsin-Chu City 300 / TW | [2024/43] |
| Former [2021/03] | For all designated states United Microelectronics Corp. No. 3, Lin-Hsin Rd. 2 Science-Based Industrial Park Hsin-Chu City 300 / TW | Inventor(s) | 01 /
LEE, Kuo-Hsing 5F.-2, No.16, Ln. 120, Ziyou St., Zhudong Township 310 Hsinchu County / TW | 02 /
SHENG, Yi-Chung 6F., No.92, Dongxing Rd. 701 Tainan City / TW | 03 /
HSUEH, Sheng-Yuan No.273, Wencheng 1st Rd. 70465 Tainan City / TW | 04 /
KANG, Chih-Kai No.18, Daxin Rd., Xinhua Dist. 71247 Tainan City / TW | 05 /
HUANG, Guan-Kai No.17, Aly. 27, Ln. 53, Sec. 2, Zhonghua N. Rd. North Dist. 704 Tainan City / TW | 06 /
WU, Chien-Liang No. 15, Ziqiang Rd. Xinwei Vil., Yanpu Township 907 Pingtung County / TW | [2021/03] | Representative(s) | Isarpatent Patent- und Rechtsanwälte Barth Charles Hassa Peckmann & Partner mbB Friedrichstrasse 31 80801 München / DE | [N/P] |
| Former [2021/03] | Isarpatent Patent- und Rechtsanwälte Behnisch Barth Charles Hassa Peckmann & Partner mbB Friedrichstrasse 31 80801 München / DE | Application number, filing date | 20168434.7 | 07.04.2020 | [2021/03] | Priority number, date | CN201910649098 | 18.07.2019 Original published format: CN201910649098 | [2021/03] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP3767683 | Date: | 20.01.2021 | Language: | EN | [2021/03] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 22.09.2020 | Classification | IPC: | H01L29/778, H01L21/337, H01L21/336, H01L29/06, H01L29/40, // H01L29/10, H01L29/207, H01L29/423, H01L29/417, H01L29/20 | [2021/03] | CPC: |
H10D30/4755 (EP,CN,US);
H10D30/015 (EP,CN,US);
H10D62/106 (EP);
H10D64/111 (EP);
H10D64/411 (CN);
H10D62/343 (EP);
H10D62/8503 (EP,CN);
H10D62/854 (EP);
H10D64/256 (EP,CN);
H10D64/513 (EP)
(-)
| Designated contracting states | AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LI, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR [2021/34] |
| Former [2021/03] | AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LI, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR | Extension states | BA | Not yet paid | ME | Not yet paid | Validation states | KH | Not yet paid | MA | Not yet paid | MD | Not yet paid | TN | Not yet paid | Title | German: | TRANSISTOR MIT HOHER ELEKTRONENBEWEGLICHKEIT UND SEIN HERSTELLUNGSVERFAHREN | [2021/03] | English: | HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) AND FORMING METHOD THEREOF | [2021/03] | French: | TRANSISTOR À HAUTE MOBILITÉ ÉLECTRONIQUE ET SON PROCÉDÉ DE FABRICATION | [2021/03] | Examination procedure | 19.07.2021 | Amendment by applicant (claims and/or description) | 19.07.2021 | Examination requested [2021/34] | 19.07.2021 | Date on which the examining division has become responsible | 02.12.2022 | Despatch of a communication from the examining division (Time limit: M04) | 10.02.2023 | Reply to a communication from the examining division | Fees paid | Renewal fee | 21.03.2022 | Renewal fee patent year 03 | 21.03.2023 | Renewal fee patent year 04 | 21.03.2024 | Renewal fee patent year 05 | 15.04.2025 | Renewal fee patent year 06 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [XI] US2013193485 (AKIYAMA SHINICHI et al.) [X] 1-3,6-15 * e.g. figure 15 and associated text * * figures 8B-C, E, 14D-E, G-H *[I] 4,5 | [XI] SHENG JIANG ET AL: "All-GaN-Integrated Cascode Heterojunction Field Effect Transistors", IEEE TRANSACTIONS ON POWER ELECTRONICS, vol. 32, no. 11, November 2017 (2017-11-01), USA, pages 8743 - 8750, XP055691900, ISSN: 0885-8993, DOI: 10.1109/TPEL.2016.2643499 [X] 1,2,4-7,9-11,13,14 * figure 2(a) * * part II.A *[I] 3,8,12,15 DOI: http://dx.doi.org/10.1109/TPEL.2016.2643499 | Examination | US2016336313 | US2009032820 |