EP3907885 - LOW VOLTAGE CLOCK SWING TOLERANT SEQUENTIAL CIRCUITS FOR DYNAMIC POWER SAVINGS [Right-click to bookmark this link] | |||
Former [2021/45] | LOW VOLTAGE CLOCK SWING TOLERANT SEQUENTIAL CIRCUITS FOR DYNAMIC POWER SAVING | ||
[2022/39] | Status | No opposition filed within time limit Status updated on 22.12.2023 Database last updated on 25.09.2024 | |
Former | The patent has been granted Status updated on 13.01.2023 | ||
Former | Grant of patent is intended Status updated on 28.08.2022 | ||
Former | Request for examination was made Status updated on 08.10.2021 | Most recent event Tooltip | 31.05.2024 | Lapse of the patent in a contracting state New state(s): IT | published on 03.07.2024 [2024/27] | Applicant(s) | For all designated states Apple Inc. One Apple Park Way Cupertino, CA 95014 / US | [2021/45] | Inventor(s) | 01 /
VENUGOPAL, Vivekanandan Cupertino, CA, 95014 / US | 02 /
BHATIA, Ajay Cupertino, CA, 95014 / US | 03 /
YE, Qi Cupertino, CA, 95014 / US | [2021/45] | Representative(s) | Lang, Johannes Bardehle Pagenberg Partnerschaft mbB Patentanwälte, Rechtsanwälte Prinzregentenplatz 7 81675 München / DE | [2021/45] | Application number, filing date | 21169462.5 | 20.04.2021 | [2021/45] | Priority number, date | US202016866307 | 04.05.2020 Original published format: US202016866307 | [2021/45] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP3907885 | Date: | 10.11.2021 | Language: | EN | [2021/45] | Type: | B1 Patent specification | No.: | EP3907885 | Date: | 15.02.2023 | Language: | EN | [2023/07] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 30.09.2021 | Classification | IPC: | H03K3/012, H03K3/037 | [2021/45] | CPC: |
H03K3/012 (EP,US);
H03K5/135 (CN);
H03K3/037 (EP,US);
Y02D10/00 (EP)
| Designated contracting states | AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LI, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR [2021/45] | Title | German: | TAKTSCHWINGUNGSTOLERANTE SEQUENTIELLE SCHALTUNGEN MIT NIEDRIGER SPANNUNG ZUR DYNAMISCHEN LEISTUNGSEINSPARUNG | [2021/45] | English: | LOW VOLTAGE CLOCK SWING TOLERANT SEQUENTIAL CIRCUITS FOR DYNAMIC POWER SAVINGS | [2022/39] | French: | CIRCUITS SÉQUENTIELS TOLÉRANTS AUX OSCILLATIONS D'HORLOGE À BASSE TENSION POUR UNE ÉCONOMIE D'ÉNERGIE DYNAMIQUE | [2021/45] |
Former [2021/45] | LOW VOLTAGE CLOCK SWING TOLERANT SEQUENTIAL CIRCUITS FOR DYNAMIC POWER SAVING | Examination procedure | 20.04.2021 | Examination requested [2021/45] | 22.04.2022 | Amendment by applicant (claims and/or description) | 29.08.2022 | Communication of intention to grant the patent | 03.01.2023 | Fee for grant paid | 03.01.2023 | Fee for publishing/printing paid | 03.01.2023 | Receipt of the translation of the claim(s) | Opposition(s) | 16.11.2023 | No opposition filed within time limit [2024/04] |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | AT | 15.02.2023 | CZ | 15.02.2023 | DK | 15.02.2023 | EE | 15.02.2023 | ES | 15.02.2023 | FI | 15.02.2023 | HR | 15.02.2023 | IT | 15.02.2023 | LT | 15.02.2023 | LV | 15.02.2023 | MC | 15.02.2023 | NL | 15.02.2023 | PL | 15.02.2023 | RO | 15.02.2023 | RS | 15.02.2023 | SE | 15.02.2023 | SI | 15.02.2023 | SK | 15.02.2023 | SM | 15.02.2023 | IE | 20.04.2023 | LU | 20.04.2023 | BE | 30.04.2023 | FR | 30.04.2023 | NO | 15.05.2023 | GR | 16.05.2023 | IS | 15.06.2023 | PT | 15.06.2023 | [2024/27] |
Former [2024/21] | AT | 15.02.2023 | |
CZ | 15.02.2023 | ||
DK | 15.02.2023 | ||
EE | 15.02.2023 | ||
ES | 15.02.2023 | ||
FI | 15.02.2023 | ||
HR | 15.02.2023 | ||
LT | 15.02.2023 | ||
LV | 15.02.2023 | ||
MC | 15.02.2023 | ||
NL | 15.02.2023 | ||
PL | 15.02.2023 | ||
RO | 15.02.2023 | ||
RS | 15.02.2023 | ||
SE | 15.02.2023 | ||
SI | 15.02.2023 | ||
SK | 15.02.2023 | ||
SM | 15.02.2023 | ||
IE | 20.04.2023 | ||
LU | 20.04.2023 | ||
BE | 30.04.2023 | ||
FR | 30.04.2023 | ||
NO | 15.05.2023 | ||
GR | 16.05.2023 | ||
IS | 15.06.2023 | ||
PT | 15.06.2023 | ||
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MC | 15.02.2023 | ||
NL | 15.02.2023 | ||
PL | 15.02.2023 | ||
RO | 15.02.2023 | ||
RS | 15.02.2023 | ||
SE | 15.02.2023 | ||
SI | 15.02.2023 | ||
SK | 15.02.2023 | ||
SM | 15.02.2023 | ||
LU | 20.04.2023 | ||
BE | 30.04.2023 | ||
FR | 30.04.2023 | ||
NO | 15.05.2023 | ||
GR | 16.05.2023 | ||
IS | 15.06.2023 | ||
PT | 15.06.2023 | ||
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EE | 15.02.2023 | ||
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RS | 15.02.2023 | ||
SE | 15.02.2023 | ||
SK | 15.02.2023 | ||
SM | 15.02.2023 | ||
LU | 20.04.2023 | ||
NO | 15.05.2023 | ||
GR | 16.05.2023 | ||
IS | 15.06.2023 | ||
PT | 15.06.2023 | ||
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PL | 15.02.2023 | ||
RO | 15.02.2023 | ||
RS | 15.02.2023 | ||
SE | 15.02.2023 | ||
SK | 15.02.2023 | ||
SM | 15.02.2023 | ||
LU | 20.04.2023 | ||
NO | 15.05.2023 | ||
GR | 16.05.2023 | ||
IS | 15.06.2023 | ||
PT | 15.06.2023 | ||
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LT | 15.02.2023 | Documents cited: | Search | [A]US2013021078 (ELKIN ILYAS [US], et al) [A] 1-15 * abstract * * paragraphs [0002] , [0004] , [0008] , [0009] , [0034] - [0039] - [0067] *; | [A] - ZHANG YAN ET AL, "Low clock-swing conditional-precharge flip-flop for more than 30% power reduction", ELECTRONICS LETTERS, IEE STEVENAGE, GB, (20000427), vol. 36, no. 9, doi:10.1049/EL:20000491, ISSN 0013-5194, pages 785 - 786, XP006015145 [A] 1-15 * abstract * * page 1, column left * * page 2, column left, line 1 - line 5 * DOI: http://dx.doi.org/10.1049/el:20000491 | [A] - LI X ET AL, "Self-blocking flip-flop design", ELECTRONICS LETTERS, IEE STEVENAGE, GB, (20120119), vol. 48, no. 2, doi:10.1049/EL.2011.2888, ISSN 0013-5194, pages 82 - 83, XP006040540 [A] 1,4-8,10-15 * abstract * DOI: http://dx.doi.org/10.1049/el.2011.2888 |