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Extract from the Register of European Patents

EP About this file: EP3933921

EP3933921 - SEMICONDUCTOR STRUCTURE, METHOD FOR FORMING SAME, AND MEMORY [Right-click to bookmark this link]
StatusThe patent has been granted
Status updated on  08.12.2023
Database last updated on 13.09.2024
FormerGrant of patent is intended
Status updated on  09.10.2023
FormerExamination is in progress
Status updated on  27.01.2023
FormerRequest for examination was made
Status updated on  03.12.2021
FormerThe international publication has been made
Status updated on  05.11.2021
Formerunknown
Status updated on  16.09.2021
Most recent event   Tooltip08.08.2024Lapse of the patent in a contracting state
New state(s): SE
published on 11.09.2024  [2024/37]
Applicant(s)For all designated states
Changxin Memory Technologies, Inc.
No. 388, Xingye Avenue
Airport Industrial Park
Economic and Technological Development Area
Hefei City, Anhui 230601 / CN
[2022/01]
Inventor(s)01 / ZHU, Yiming
Hefei City, Anhui 230601 / CN
02 / PING, Erxuan
Hefei City, Anhui 230601 / CN
 [2023/45]
Former [2022/01]01 / ZHU, Yiming
Hefei Anhui 230601 / CN
02 / PING, Erxuan
Hefei Anhui 230601 / CN
Representative(s)Lavoix
Bayerstraße 83
80335 München / DE
[2022/01]
Application number, filing date21766093.526.04.2021
[2022/01]
WO2021CN89780
Priority number, dateCN20201034351127.04.2020         Original published format: CN202010343511
[2022/01]
Filing languageZH
Procedural languageEN
PublicationType: A1 Application with search report
No.:WO2021218881
Date:04.11.2021
Language:ZH
[2021/44]
Type: A1 Application with search report 
No.:EP3933921
Date:05.01.2022
Language:EN
[2022/01]
Type: B1 Patent specification 
No.:EP3933921
Date:10.01.2024
Language:EN
[2024/02]
Search report(s)International search report - published on:CN04.11.2021
(Supplementary) European search report - dispatched on:EP11.05.2022
ClassificationIPC:H01L29/66, H01L29/786, H10B12/00, H10B53/30, H10B61/00, H10B63/00
[2023/43]
CPC:
H01L29/78642 (EP); H01L27/088 (CN); H10B12/312 (EP,US);
H01L21/8234 (CN); H01L29/0649 (US); H10B12/02 (EP,CN);
H10B12/0335 (EP); H10B12/05 (EP); H10B12/30 (EP,CN);
H10B12/315 (EP); H10B12/482 (EP,US); H10B53/30 (EP,CN);
H10B61/22 (EP,CN); H10B63/34 (EP,CN); H10B63/80 (EP) (-)
Former IPC [2022/23]H01L27/108, H01L29/66, H01L29/78, H01L27/11507
Former IPC [2022/01]H01L27/088, H01L21/8234, H01L27/108
Designated contracting statesAL,   AT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   LV,   MC,   MK,   MT,   NL,   NO,   PL,   PT,   RO,   RS,   SE,   SI,   SK,   SM,   TR [2022/01]
Extension statesBANot yet paid
MENot yet paid
Validation statesKHNot yet paid
MANot yet paid
MDNot yet paid
TNNot yet paid
TitleGerman:HALBLEITERSTRUKTUR, VERFAHREN ZU DEREN HERSTELLUNG UND SPEICHER[2022/01]
English:SEMICONDUCTOR STRUCTURE, METHOD FOR FORMING SAME, AND MEMORY[2022/01]
French:STRUCTURE SEMI-CONDUCTRICE, SON PROCÉDÉ DE FORMATION ET MÉMOIRE[2022/01]
Entry into regional phase15.09.2021Translation filed 
15.09.2021National basic fee paid 
15.09.2021Search fee paid 
15.09.2021Designation fee(s) paid 
15.09.2021Examination fee paid 
Examination procedure15.09.2021Examination requested  [2022/01]
21.11.2022Amendment by applicant (claims and/or description)
30.01.2023Despatch of a communication from the examining division (Time limit: M06)
17.07.2023Reply to a communication from the examining division
10.10.2023Communication of intention to grant the patent
04.12.2023Fee for grant paid
04.12.2023Fee for publishing/printing paid
04.12.2023Receipt of the translation of the claim(s)
Fees paidRenewal fee
27.03.2023Renewal fee patent year 03
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Lapses during opposition  TooltipAT10.01.2024
BG10.01.2024
ES10.01.2024
HR10.01.2024
LT10.01.2024
LV10.01.2024
NL10.01.2024
PL10.01.2024
SE10.01.2024
NO10.04.2024
RS10.04.2024
GR11.04.2024
IS10.05.2024
PT10.05.2024
[2024/37]
Former [2024/36]AT10.01.2024
BG10.01.2024
ES10.01.2024
HR10.01.2024
LT10.01.2024
LV10.01.2024
NL10.01.2024
PL10.01.2024
NO10.04.2024
RS10.04.2024
GR11.04.2024
IS10.05.2024
PT10.05.2024
Former [2024/35]AT10.01.2024
BG10.01.2024
ES10.01.2024
HR10.01.2024
LT10.01.2024
NL10.01.2024
NO10.04.2024
RS10.04.2024
GR11.04.2024
IS10.05.2024
Former [2024/33]LT10.01.2024
NL10.01.2024
NO10.04.2024
IS10.05.2024
Former [2024/32]NL10.01.2024
IS10.05.2024
Former [2024/31]NL10.01.2024
Documents cited:Search[X]US10134739  (ZANG HUI [US], et al);
 [X]CN109285838  (INST MICROELECTRONICS CAS);
 [XA]US2019157345  (ZHU HUILONG [US], et al)
International search[A]US2004113207  (HSU LOUIS L [US], et al);
 [A]US2011073925  (PARK EUN-SHIL [KR], et al);
 [A]US2012135573  (KIM JUN KI [KR]);
 [A]CN102544049  (INST OF MICROELECTRONICS CAS);
 [X]US2013234242  (HWANG EUI-SEONG [KR]);
 [X]US9673257  (TAKAKI SEJE [JP], et al);
 [PX]CN211719592U  (CHANGXIN MEMORY TECH INC)
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.