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EP0013885

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Extract from the Register of European Patents

EP About this file: EP0013885

EP0013885 - Method of avoiding undesirable parity error signals during the parity check of a register array and parity check device for carrying out the method [Right-click to bookmark this link]
Former [1980/16]	Parity check device for a register array
	[1984/35]
Status	No opposition filed within time limit Status updated on 22.07.1985 Database last updated on 28.03.2026
Most recent event Tooltip	17.03.1989	Lapse of the patent in a contracting state	published on 03.05.1989 [1989/18]
Applicant(s)	For all designated states International Business Machines Corporation New Orchard Road Armonk, NY 10504 / US
	[N/P]
Former [1980/16]	For all designated states International Business Machines Corporation Old Orchard Road Armonk, N.Y. 10504 / US
Inventor(s)	01 / Jeremiah, Thomas Leo 1705 Creekview Drive Round Rock, Texas 78664 / US
	02 / Pezdirtz, Karl Frederick R.D. 1, Box 375 Vestal, New York 13850 / US
	[1980/16]
Representative(s)	Lewit, Leonard IBM Deutschland GmbH Schönaicher Strasse 220 D-7030 Böblingen / DE
	[N/P]
Former [1980/16]	Lewit, Leonard, Dipl.-Ing. IBM Deutschland GmbH Schönaicher Strasse 220 D-7030 Böblingen / DE
Application number, filing date	80100040.7	04.01.1980
	[1980/16]
Priority number, date	US19790006712	26.01.1979 Original published format: US 6712
	[1980/16]
Filing language	DE
Procedural language	DE
Publication	Type:	A2 Application without search report
	No.:	EP0013885
	Date:	06.08.1980
	Language:	DE
	[1980/16]
	Type:	A3 Search report
	No.:	EP0013885
	Date:	01.04.1981
	Language:	DE
	[1981/13]
	Type:	B1 Patent specification
	No.:	EP0013885
	Date:	29.08.1984
	Language:	DE
	[1984/35]
Search report(s)	(Supplementary) European search report - dispatched on:	EP	30.01.1981
Classification	IPC:	G06F11/10, G11C29/00, H03K13/34, H04L1/10	[1981/14]
	CPC:	G06F11/1008 (EP,US); G06F11/1076 (EP,US)
	Former IPC [1981/13]	G06F11/10, G11C29/00, H03K13/34
	Former IPC [1980/16]	G06F11/10, H03K13/34
Designated contracting states	AT, CH, DE, FR, GB [1980/16]
Title	German:	Verfahren zur Vermeidung von unerwünschten Paritätsfehlersignalen bei der Paritätprüfung eines Registerfeldes und Paritätsprüfeinrichtung zur Durchführung des Verfahrens	[1984/35]
	English:	Method of avoiding undesirable parity error signals during the parity check of a register array and parity check device for carrying out the method	[1984/35]
	French:	Procédé d'élimination de signaux d'erreur de parité indésirables pendant la vérification de parité d'un ensemble de registres et dispositif de mise en oeuvre du dit procédé	[1984/35]
	Former [1980/16]	Paritätsprüfeinrichtung für ein Registerfeld
	Former [1980/16]	Parity check device for a register array
	Former [1980/16]	Dispositif de contrôle de parité pour un tableau de registres
File destroyed:	12.06.1999
Examination procedure	14.07.1981	Examination requested [1981/38]
	02.07.1982	Despatch of a communication from the examining division (Time limit: M08)
	04.03.1983	Reply to a communication from the examining division
	19.04.1983	Despatch of a communication from the examining division (Time limit: M04)
	30.07.1983	Reply to a communication from the examining division
	03.11.1983	Despatch of communication of intention to grant (Approval: )
	27.01.1984	Communication of intention to grant the patent
	12.04.1984	Fee for grant paid
	12.04.1984	Fee for publishing/printing paid
Opposition(s)	30.05.1985	No opposition filed within time limit [1985/39]
Fees paid	Renewal fee
	19.01.1982	Renewal fee patent year 03
	21.01.1983	Renewal fee patent year 04
	26.01.1984	Renewal fee patent year 05
Opt-out from the exclusive Tooltip competence of the Unified Patent Court	See the Register of the Unified Patent Court for opt-out data
	Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition Tooltip	CH	31.01.1985
	[1989/18]

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