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EP0049629
European procedure
Extract from the Register of European Patents
EP About this file: EP0049629
| EP0049629 - Redundancy scheme for a dynamic RAM [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 29.03.1988 Database last updated on 20.09.2024 | Most recent event Tooltip | 29.03.1988 | No opposition filed within time limit | published on 18.05.1988 [1988/20] | Applicant(s) | For all designated states INMOS CORPORATION P.O. Box 16000 Colorado Springs Colorado 80935 / US | [N/P] |
| Former [1987/03] | For all designated states INMOS CORPORATION P.O. Box 16000 Colorado Springs Colorado 80935 / US | ||
| Former [1982/15] | For all designated states INMOS CORPORATION 2853 Janitell Road Colorado Springs Colorado 80906 / US | Inventor(s) | 01 /
Eaton, Sargent Sheffield, Jr. 3361 Springridge Circle Colorado Springs Colorado 80906 / US | 02 /
Wooten, David Rudolph 318 West Cheyenne Mountain Blvd. Colorado Springs Colorado 80906 / US | [1982/15] | Representative(s) | Needle, Jacqueline, et al PAGE, WHITE & FARRER 54 Doughty Street London WC1N 2LS / GB | [N/P] |
| Former [1982/15] | Needle, Jacqueline, et al PAGE, WHITE & FARRER 54 Doughty Street London WC1N 2LS / GB | Application number, filing date | 81304603.4 | 05.10.1981 | [1982/15] | Priority number, date | US19800194613 | 06.10.1980 Original published format: US 194613 | [1982/15] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0049629 | Date: | 14.04.1982 | Language: | EN | [1982/15] | Type: | A3 Search report | No.: | EP0049629 | Date: | 17.08.1983 | Language: | EN | [1983/33] | Type: | B1 Patent specification | No.: | EP0049629 | Date: | 27.05.1987 | Language: | EN | [1987/22] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 14.06.1983 | Classification | IPC: | G06F11/20 | [1982/15] | CPC: |
G11C29/808 (EP,US)
| Designated contracting states | DE, FR, GB, NL [1982/15] | Title | German: | Redundanzschema für einen dynamischen Direktzugriffspeicher | [1982/15] | English: | Redundancy scheme for a dynamic RAM | [1982/15] | French: | Schèma de redondance pour une mémoire dynamique à accés aléatoire | [1982/15] | Examination procedure | 14.10.1983 | Examination requested [1983/52] | 14.08.1984 | Despatch of a communication from the examining division (Time limit: M06) | 11.02.1985 | Reply to a communication from the examining division | 24.04.1985 | Despatch of a communication from the examining division (Time limit: M06) | 30.10.1985 | Reply to a communication from the examining division | 30.12.1985 | Despatch of a communication from the examining division (Time limit: M04) | 03.05.1986 | Reply to a communication from the examining division | 26.08.1986 | Despatch of communication of intention to grant (Approval: ) | 03.12.1986 | Communication of intention to grant the patent | 06.02.1987 | Fee for grant paid | 06.02.1987 | Fee for publishing/printing paid | Divisional application(s) | EP85113807.3 / EP0180212 | Opposition(s) | 01.03.1988 | No opposition filed within time limit [1988/20] | Fees paid | Renewal fee | 29.09.1983 | Renewal fee patent year 03 | 02.08.1984 | Renewal fee patent year 04 | 07.09.1985 | Renewal fee patent year 05 | 16.10.1986 | Renewal fee patent year 06 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [Y]US3969706 (PROEBSTING ROBERT JAMES, et al); | [A]US4051354 (CHOATE WILLIAM CLAY) | [Y] - ELECTRONICS INTERNATIONAL, vol. 53, no. 20; September 11 1980, pages 117-123; New York, US | [P] - IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, vol. 24, February 1981, pages 84-85, New York, US | [A] - ELECTRONICS, vol. 53, no. 6, March 13 1980, pages 115-121, New York, US | Examination | - ELECTRONICS INTERNATIONAL, vol. 53, no. 20; September 11 1980, pages 117-123; New York, US. SUD et al.: "16-K static RAM takes new route to high speed" | - IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, vol. 24, February 1981, pages 84-85, New York, US. EATON et al.: "Memories and redundancy techniques. A 100ns 64K dynamic RAM using redundancy techniques" | - ELECTRONICS, vol. 53, no. 6, March 13 1980, pages 115-121, New York, US. V. G. McKENNY: "Good bits swapped for bad in 64-kilobit E-PROM" |