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EP0071727
European procedure
Extract from the Register of European Patents
EP About this file: EP0071727
| EP0071727 - Restructurable integrated circuit [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 30.07.1987 Database last updated on 25.09.2024 | Most recent event Tooltip | 30.07.1987 | No opposition filed within time limit | published on 16.09.1987 [1987/38] | Applicant(s) | For all designated states Texas Instruments Incorporated 13500 North Central Expressway Dallas, Texas 75265 / US | [N/P] |
| Former [1983/07] | For all designated states TEXAS INSTRUMENTS INCORPORATED 13500 North Central Expressway Dallas Texas 75265 / US | Inventor(s) | 01 /
Budzinski, Robert L. 1106 Edgewood Drive Richardson Texas 75081 / US | 02 /
Thatte, Satish M. 1304 Elk Grove Richardson Texas 75081 / US | [1983/07] | Representative(s) | Leiser, Gottfried, et al Patentanwälte Prinz, Leiser, Bunke & Partner Manzingerweg 7 D-8000 München 60 / DE | [N/P] |
| Former [1986/44] | Leiser, Gottfried, Dipl.-Ing., et al Patentanwälte Prinz, Leiser, Bunke & Partner Manzingerweg 7 D-8000 München 60 / DE | ||
| Former [1983/07] | Leiser, Gottfried, Dipl.-Ing. Prinz & Partner, Manzingerweg 7 D-81241 München / DE | Application number, filing date | 82105491.3 | 23.06.1982 | [1983/07] | Priority number, date | US19810286426 | 24.07.1981 Original published format: US 286426 | US19810286424 | 24.07.1981 Original published format: US 286424 | US19810286425 | 24.07.1981 Original published format: US 286425 | [1983/07] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP0071727 | Date: | 16.02.1983 | Language: | EN | [1983/07] | Type: | B1 Patent specification | No.: | EP0071727 | Date: | 01.10.1986 | Language: | EN | [1986/40] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 09.12.1982 | Classification | IPC: | G06F15/06 | [1983/07] | CPC: |
G06F15/7896 (EP)
| Designated contracting states | DE, FR, GB, NL [1983/07] | Title | German: | Integrierte Schaltung mit änderbarer Struktur | [1983/07] | English: | Restructurable integrated circuit | [1983/07] | French: | Circuit intégré restructurable | [1983/07] | Examination procedure | 23.06.1983 | Examination requested [1983/35] | 16.03.1984 | Despatch of a communication from the examining division (Time limit: M08) | 23.11.1984 | Reply to a communication from the examining division | 07.01.1985 | Despatch of a communication from the examining division (Time limit: M04) | 10.05.1985 | Reply to a communication from the examining division | 10.10.1985 | Despatch of communication of intention to grant (Approval: ) | 10.01.1986 | Communication of intention to grant the patent | 10.03.1986 | Fee for grant paid | 10.03.1986 | Fee for publishing/printing paid | Opposition(s) | 02.07.1987 | No opposition filed within time limit [1987/38] | Fees paid | Renewal fee | 05.06.1984 | Renewal fee patent year 03 | 13.06.1985 | Renewal fee patent year 04 | 24.06.1986 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [Y]FR2406852 ; | [A]US4034356 ; | [A]EP0031889 | [X] - FOURTH EUROMICRO SYMPOSIUM ON MICROPROCESSING AND MICROPROGRAMMING, LARGE SCALE INTEGRATION: TECHNOLOGY, APPLICATIONS AND IMPACTS, 17th-19th October 1978- Munich, pages 34-38, North-Holland Publishing company-Amsterdam (NL); | [YD] - IEEE TRANSACTIONS ON COMPUTERS, vol. C-28, no. 10, October 1979, pages 704-721, New York (USA); | [Y] - ELECTRONIC DESIGN, vol. 29, no. 10, May 1981, pages 197-202, WASECA, MN (USA); | [A] - EDN, vol. 23, no. 3, 5th February 1978, pages 53-61, Denver (USA); | [A] - MORRIS B.: "Semiconductor circuit design", vol. 4, 1975, pages 103-123, Texas Instruments, Bedford (GB); | [L] - IEEE TRANSACTIONS ON COMPUTERS, vol. C-28, no. 9, September 1979, pages 602-608, New York (USA); |