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EP0067688
European procedure
Extract from the Register of European Patents
EP About this file: EP0067688
| EP0067688 - Integrated semiconductor device including a Bias voltage generator [Right-click to bookmark this link] | |||
| Former [1982/51] | Bias voltage generators | ||
| [1987/06] | Status | No opposition filed within time limit Status updated on 08.12.1987 Database last updated on 17.07.2024 | Most recent event Tooltip | 08.12.1987 | No opposition filed within time limit | published on 27.01.1988 [1988/04] | Applicant(s) | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi Kanagawa 211 / JP | [N/P] |
| Former [1982/51] | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi, Kanagawa 211 / JP | Inventor(s) | 01 /
Takemae, Yoshihiro 1-20-5-9-301, Utsukushigaoka Midori-ku Yokohama-shi Kanagawa 227 / JP | 02 /
Nakano, Tomio 1-11-2-12-404, Shirahatadai Takatsu-ku Kawasaki-shi Kanagawa 213 / JP | 03 /
Nakano, Masao 473-4, Hisasue Takatsu-ku Kawasaki-shi Kanagawa 213 / JP | 04 /
Tsuge, Norishisa 6-14, Zaimokuza 5-chome Kamakura-shi Kanagawa 248 / JP | 05 /
Ohira, Tsuyoshi Fujitsu Dai 2 Eda-ryo 440-1, Eda-cho Midori-ku Yokohama-shi Kanagawa 227 / JP | [1982/51] | Representative(s) | Fane, Christopher Robin King, et al Haseltine Lake & Co., Imperial House, 15-19 Kingsway London WC2B 6UD / GB | [N/P] |
| Former [1982/51] | Fane, Christopher Robin King, et al HASELTINE LAKE & CO. Hazlitt House 28 Southampton Buildings Chancery Lane London, WC2A 1AT / GB | Application number, filing date | 82303044.0 | 11.06.1982 | [1982/51] | Priority number, date | JP19810089460 | 12.06.1981 Original published format: JP 8946081 | [1982/51] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP0067688 | Date: | 22.12.1982 | Language: | EN | [1982/51] | Type: | B1 Patent specification | No.: | EP0067688 | Date: | 04.02.1987 | Language: | EN | [1987/06] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 27.10.1982 | Classification | IPC: | G05F3/20 | [1982/51] | CPC: |
G05F3/205 (EP,US)
| Designated contracting states | DE, FR, GB, NL [1982/51] | Title | German: | Integrierte Halbleiterschaltung mit Vorspannungserzeuger | [1987/06] | English: | Integrated semiconductor device including a Bias voltage generator | [1987/06] | French: | Circuit semiconducteur intégré comprenant un générateur de tension de polarisation | [1987/06] |
| Former [1982/51] | Vorspannungserzeuger | ||
| Former [1982/51] | Bias voltage generators | ||
| Former [1982/51] | Générateurs de tension de polarisation | Examination procedure | 20.04.1983 | Examination requested [1983/26] | 24.08.1984 | Despatch of a communication from the examining division (Time limit: M08) | 24.04.1985 | Reply to a communication from the examining division | 18.09.1985 | Despatch of a communication from the examining division (Time limit: M04) | 21.01.1986 | Reply to a communication from the examining division | 21.04.1986 | Despatch of communication of intention to grant (Approval: ) | 08.08.1986 | Communication of intention to grant the patent | 08.09.1986 | Fee for grant paid | 08.09.1986 | Fee for publishing/printing paid | Opposition(s) | 05.11.1987 | No opposition filed within time limit [1988/04] | Fees paid | Renewal fee | 05.06.1984 | Renewal fee patent year 03 | 06.06.1985 | Renewal fee patent year 04 | 03.06.1986 | Renewal fee patent year 05 |
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