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Extract from the Register of European Patents

EP About this file: EP0153108

EP0153108 - Decimal digit processing apparatus and method [Right-click to bookmark this link]
StatusThe application is deemed to be withdrawn
Status updated on  28.08.1992
Database last updated on 16.07.2024
Most recent event   Tooltip07.07.2007Change - inventorpublished on 08.08.2007  [2007/32]
Applicant(s)For all designated states
PRIME COMPUTER, INC.
Prime Park Natick
Massachusetts 01760 / US
[N/P]
Former [1985/35]For all designated states
PRIME COMPUTER, INC.
Prime Park
Natick Massachusetts 01760 / US
Inventor(s)01 / Curtin, Richard R.
195 West Plain Street
Wayland Massachusetts 01778 / US
02 / Clemente, Paul M.
85 Mountain Gate Road
Ashland Massachusetts 01721 / US
[1985/35]
Representative(s)Blatchford, William Michael, et al
Withers & Rogers LLP
4 More London Riverside
London
SE1 2AU / GB
[N/P]
Former [1985/35]Blatchford, William Michael, et al
Withers & Rogers 4 Dyer's Buildings Holborn
London EC1N 2JT / GB
Application number, filing date85300857.108.02.1985
[1985/35]
Priority number, dateUS1984057909110.02.1984         Original published format: US 579091
[1985/35]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0153108
Date:28.08.1985
Language:EN
[1985/35]
Type: A3 Search report 
No.:EP0153108
Date:16.09.1987
Language:EN
[1987/38]
Search report(s)(Supplementary) European search report - dispatched on:EP27.07.1987
ClassificationIPC:G06F7/48
[1985/35]
CPC:
G06F7/491 (EP,US); G06F7/575 (EP,US)
Designated contracting statesAT,   BE,   CH,   DE,   FR,   GB,   IT,   LI,   LU,   NL,   SE [1985/35]
TitleGerman:Einrichtung und Verfahren für die Verarbeitung dezimaler Ziffern[1985/35]
English:Decimal digit processing apparatus and method[1985/35]
French:Appareil et méthode de traitement de chiffres décimaux[1985/35]
File destroyed:12.06.1999
Examination procedure06.02.1988Examination requested  [1988/14]
13.06.1989Despatch of a communication from the examining division (Time limit: M06)
18.12.1989Reply to a communication from the examining division
10.04.1990Despatch of a communication from the examining division (Time limit: M06)
13.10.1990Reply to a communication from the examining division
05.11.1990Despatch of a communication from the examining division (Time limit: M04)
15.03.1991Reply to a communication from the examining division
29.05.1991Despatch of communication of intention to grant (Approval: No)
29.12.1991Despatch of communication of intention to grant (Approval: later approval)
10.01.1992Communication of intention to grant the patent
22.04.1992Application deemed to be withdrawn, date of legal effect  [1992/43]
25.05.1992Despatch of communication that the application is deemed to be withdrawn, reason: fee for grant / fee for printing not paid in time  [1992/43]
Fees paidRenewal fee
27.01.1987Renewal fee patent year 03
25.01.1988Renewal fee patent year 04
17.01.1989Renewal fee patent year 05
11.01.1990Renewal fee patent year 06
15.01.1991Renewal fee patent year 07
14.01.1992Renewal fee patent year 08
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Documents cited:Search[A]US3752394  (IGEL J);
 [X]GB2041590  (HONEYWELL INF SYSTEMS);
 [A]JPS593633  (NIPPON ELECTRIC CO)
 [A]  - ELECTRONIC DESIGN, vol. 29, no. 25, 10th December 1981, pages 104-112, Waseca, US; M.J. MILLER et al.: "Bit-slice processor speeds through BCD math"
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.