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Extract from the Register of European Patents

EP About this file: EP0197078

EP0197078 - METHOD FOR MAKING MONOCRYSTALLINE SILICON ISLANDS ELECTRICALLY ISOLATED FROM EACH OTHER [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  29.12.1990
Database last updated on 12.07.2024
Most recent event   Tooltip29.12.1990No opposition filed within time limitpublished on 20.02.1991 [1991/08]
Applicant(s)For all designated states
Haond, Michel
9, rue des Lilas
F-38240 Meylan / FR
For all designated states
Colinge, Jean-Pierre
5 av. du Vercors
F-38240 Meylan / FR
For all designated states
Bensahel, Daniel
32 rue Lachman
F-38000 Grenoble / FR
For all designated states
DUTARTRE, Didier
4, allée du Bret
F-38240 Meylan / FR
[1986/42]
Inventor(s)01 / see applicant
...
[1986/42]
Representative(s)Mongrédien, André, et al
c/o BREVATOME 25, rue de Ponthieu
F-75008 Paris / FR
[1986/42]
Application number, filing date85904827.401.10.1985
[1986/42]
WO1985FR00270
Priority number, dateFR1984001530205.10.1984         Original published format: FR 8415302
[1986/42]
Filing languageFR
Procedural languageFR
PublicationType: A1 Application with search report
No.:WO8602198
Date:10.04.1986
Language:FR
[1986/08]
Type: A1 Application with search report 
No.:EP0197078
Date:15.10.1986
Language:FR
The application published by WIPO in one of the EPO official languages on 10.04.1986 takes the place of the publication of the European patent application.
[1986/42]
Type: B1 Patent specification 
No.:EP0197078
Date:07.03.1990
Language:FR
[1990/10]
Search report(s)International search report - published on:EP10.04.1986
ClassificationIPC:H01L21/20, H01L21/76, H01L21/324
[1986/42]
CPC:
H01L21/76264 (EP,US); H01L21/02381 (EP,US); H01L21/02488 (EP,US);
H01L21/02532 (EP,US); H01L21/02587 (EP,US); H01L21/0262 (EP,US);
H01L21/02658 (EP,US); H01L21/02667 (EP,US); H01L21/76272 (EP,US) (-)
Designated contracting statesDE,   FR,   GB [1986/42]
TitleGerman:VERFAHREN ZUR HERSTELLUNG VON GEGENSEITIG ISOLIERTEN INSELN AUS MONOKRISTALLINEM SILIZIUM[1986/42]
English:METHOD FOR MAKING MONOCRYSTALLINE SILICON ISLANDS ELECTRICALLY ISOLATED FROM EACH OTHER[1986/42]
French:PROCEDE DE FABRICATION D'ILOTS DE SILICIUM MONOCRISTALLIN ISOLES ELECTRIQUEMENT LES UNS DES AUTRES[1986/42]
File destroyed:12.06.1999
Entry into regional phase28.05.1986National basic fee paid 
28.05.1986Designation fee(s) paid 
28.05.1986Examination fee paid 
Examination procedure28.05.1986Examination requested  [1986/42]
19.07.1988Despatch of a communication from the examining division (Time limit: M04)
19.08.1988Reply to a communication from the examining division
01.02.1989Despatch of communication of intention to grant (Approval: Yes)
20.04.1989Communication of intention to grant the patent
05.06.1989Fee for grant paid
05.06.1989Fee for publishing/printing paid
Opposition(s)08.12.1990No opposition filed within time limit [1991/08]
Fees paidRenewal fee
21.10.1987Renewal fee patent year 03
28.10.1988Renewal fee patent year 04
20.10.1989Renewal fee patent year 05
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Cited inInternational searchDE3221304  [ ] (ITT IND GMBH DEUTSCHE [DE]);
 US4507158  [ ] (KAMINS THEODORE I [US], et al)
 [Y]  - International Electron Devices Meeting Washington D.C., 8-9-10 December 1980, IEDM Technical Digest, New York, (US) H.W. LAM et al.: "MOSFETs Fabricated in (100) Single Crystal Silicon-on-Oxide Obtained by a Laser-Induced Lateral Seeding Technique", pages 559-561, see page 559, column 1, Paragraph 5 - page 560, column 1, Paragraph 6
 [Y]  - International Electron Devices Meeting San Francisco C.A., 13-14-15 December 1982, IEDM Technical Digest, IEEE, New York, (US) S.D.S. MALHI et al.: "SOI CMOS Circuit Performance on Graphite Strip Heater Recrystallized Material", pages 441-443, see page 441, column 1, Paragraph 3 - page 442, column 1, Paragraph 3
 [Y]  - Japanese Journal of Applied Physics, Supplements 1983, Supplement 15th Conference Tokyo, (JP) H. YAMAMOTO et al.: "Growth Conditions of Evaporated Amorphous si Films into SIO2 Patterns by Lateral solid Phase Epitaxy", pages 89-92, see page 89, Abstract
 [A]  - IBM Technical Disclosure Bulletin, Volume 24, No. 7 beta, December 1981, New York, (US) V.J. SILVESTRI: "Silicon-Silicon Dioxide-Silicon Structures", pages 3689-3690, see figures 1-6; 3690, Paragraph 2
 [A]  - Journal of the Electrochemical Society, Volume 131, No. 8, August 1984, Manchester, New Hampshire (US) D.R. BRADBURY et al.: "Device Isolation in Lateral CVD Epitaxial Silicon-on-Insulator", page 320C, see Abstract No. 523
ExaminationEP0141506
    - IBM Technical Disclosure Bulletin, volume 24, No. 78, December 1981, New York, (US) V.J. Silvestri: "Silicon-Silicon Dioxide-Silicon structures", pages 3689-3690
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.