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EP0204762
European procedure
Extract from the Register of European Patents
EP About this file: EP0204762
| EP0204762 - Integrated logic circuit [Right-click to bookmark this link] | |||
| Former [1986/51] | HIGH RELIABILITY COMPLEMENTARY LOGIC | ||
| [1991/09] | Status | No opposition filed within time limit Status updated on 28.12.1991 Database last updated on 02.11.2024 | Most recent event Tooltip | 28.12.1991 | No opposition filed within time limit | published on 19.02.1992 [1992/08] | Applicant(s) | For all designated states AT&T Corp. 32 Avenue of the Americas New York, NY 10013-2412 / US | [1986/51] | Inventor(s) | 01 /
KIRSCH, Howard, Clayton Box 207A RD No. 2 Oak Hill Road Emmaus, PA 18049 / US | [1986/51] | Representative(s) | Buckley, Christopher Simon Thirsk, et al Lucent Technologies (UK) Ltd, 5 Mornington Road Woodford Green Essex IG8 0TU / GB | [N/P] |
| Former [1989/44] | Buckley, Christopher Simon Thirsk, et al AT&T (UK) LTD., AT&T Intellectual Property Division, 5 Mornington Road Woodford Green, Essex IG8 0TU / GB | ||
| Former [1986/51] | Buckley, Christopher Simon Thirsk AT&T (UK) Ltd. 5 Mornington Road Woodford Green Essex IG8 0TU / GB | Application number, filing date | 85906107.9 | 13.11.1985 | [1986/51] | WO1985US02242 | Priority number, date | US19840680167 | 10.12.1984 Original published format: US 680167 | [1986/51] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | WO8603632 | Date: | 19.06.1986 | Language: | EN | [1986/13] | Type: | A1 Application with search report | No.: | EP0204762 | Date: | 17.12.1986 | Language: | EN | The application published by WIPO in one of the EPO official languages on 19.06.1986 takes the place of the publication of the European patent application. | [1986/51] | Type: | B1 Patent specification | No.: | EP0204762 | Date: | 27.02.1991 | Language: | EN | [1991/09] | Search report(s) | International search report - published on: | EP | 19.06.1986 | Classification | IPC: | H03K19/003 | [1986/51] | CPC: |
H03K19/00361 (EP);
H03K19/00 (KR);
H03K19/00315 (EP)
| Designated contracting states | BE, DE, FR, GB, NL, SE [1986/51] | Title | German: | Integrierte Logikschaltung | [1991/09] | English: | Integrated logic circuit | [1991/09] | French: | Circuit logique integré | [1991/09] |
| Former [1986/51] | KOMPLEMENTÄRE LOGIK HOHER ZUVERLÄSSIGKEIT | ||
| Former [1986/51] | HIGH RELIABILITY COMPLEMENTARY LOGIC | ||
| Former [1986/51] | CIRCUIT LOGIQUE COMPLEMENTAIRE A HAUTE FIABILITE | Entry into regional phase | 04.08.1986 | National basic fee paid | 04.08.1986 | Designation fee(s) paid | 21.11.1986 | Examination fee paid | Examination procedure | 21.11.1986 | Examination requested [1987/05] | 27.06.1989 | Despatch of a communication from the examining division (Time limit: M04) | 26.08.1989 | Reply to a communication from the examining division | 04.01.1990 | Despatch of a communication from the examining division (Time limit: M02) | 22.02.1990 | Reply to a communication from the examining division | 03.04.1990 | Despatch of communication of intention to grant (Approval: No) | 24.08.1990 | Despatch of communication of intention to grant (Approval: later approval) | 03.09.1990 | Communication of intention to grant the patent | 30.10.1990 | Fee for grant paid | 30.10.1990 | Fee for publishing/printing paid | Opposition(s) | 28.11.1991 | No opposition filed within time limit [1992/08] | Fees paid | Renewal fee | 20.11.1987 | Renewal fee patent year 03 | 16.11.1988 | Renewal fee patent year 04 | 17.11.1989 | Renewal fee patent year 05 | 16.11.1990 | Renewal fee patent year 06 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Cited in | International search | US4274014 [ ] (SCHADE JR OTTO H); | US3818245 [ ] (SUZUKI Y, et al); | US4069430 [ ] (MASUDA KENZO) |