EP0193934 - Semiconductor integreated circuit device and method of manufacturing the same [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 26.05.1994 Database last updated on 09.09.2024 | Most recent event Tooltip | 26.05.1994 | No opposition filed within time limit | published on 13.07.1994 [1994/28] | Applicant(s) | For all designated states Kabushiki Kaisha Toshiba 72, Horikawa-cho, Saiwai-ku Kawasaki-shi Kanagawa-ken 210-8572 / JP | [N/P] |
Former [1986/37] | For all designated states KABUSHIKI KAISHA TOSHIBA 72, Horikawa-cho, Saiwai-ku Kawasaki-shi, Kanagawa-ken 210, Tokyo / JP | Inventor(s) | 01 /
Iwasaki, Hiroshi c/o Patent Division Kabushiki Kaisha Toshiba 1-1 Shibaura 1-chome Minato-ku Tokyo 105 / JP | [1986/37] | Representative(s) | Eitle, Werner, et al Hoffmann Eitle, Patent- und Rechtsanwälte, Postfach 81 04 20 81904 München / DE | [N/P] |
Former [1986/37] | Eitle, Werner, Dipl.-Ing., et al Hoffmann, Eitle & Partner, Patent- und Rechtsanwälte, Postfach 81 04 20 D-81904 München / DE | Application number, filing date | 86102856.1 | 05.03.1986 | [1986/37] | Priority number, date | JP19850045137 | 07.03.1985 Original published format: JP 4513785 | JP19850046023 | 08.03.1985 Original published format: JP 4602385 | JP19850051720 | 15.03.1985 Original published format: JP 5172085 | JP19850065230 | 29.03.1985 Original published format: JP 6523085 | JP19850065231 | 29.03.1985 Original published format: JP 6523185 | [1986/37] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0193934 | Date: | 10.09.1986 | Language: | EN | [1986/37] | Type: | A3 Search report | No.: | EP0193934 | Date: | 07.01.1988 | Language: | EN | [1988/01] | Type: | B1 Patent specification | No.: | EP0193934 | Date: | 21.07.1993 | Language: | EN | [1993/29] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 18.11.1987 | Classification | IPC: | H01L27/02, H01L27/06, H01L21/82, H01L21/311, H01L21/285, H01L29/73 | [1993/29] | CPC: |
H01L29/0692 (EP,US);
H01L21/2257 (EP,US);
H01L21/8226 (EP,US);
H01L21/8248 (EP,US);
H01L21/8249 (EP,US);
H01L27/0244 (EP,US);
| C-Set: |
H01L2924/0002, H01L2924/00 (EP,US)
|
Former IPC [1986/37] | H01L27/02, H01L27/06, H01L21/82, H01L21/31, H01L21/285 | Designated contracting states | DE, FR, GB [1986/37] | Title | German: | Integrierte Halbleiterschaltungsanordnung und Verfahren zu ihrer Herstellung | [1986/37] | English: | Semiconductor integreated circuit device and method of manufacturing the same | [1986/37] | French: | Circuit intégré semi-conducteur et son procédé de fabrication | [1986/37] | Examination procedure | 05.03.1986 | Examination requested [1986/37] | 14.04.1988 | Despatch of a communication from the examining division (Time limit: M06) | 14.10.1988 | Reply to a communication from the examining division | 21.02.1989 | Despatch of a communication from the examining division (Time limit: M06) | 22.08.1989 | Reply to a communication from the examining division | 01.03.1990 | Despatch of a communication from the examining division (Time limit: M06) | 04.09.1990 | Reply to a communication from the examining division | 06.11.1991 | Date of oral proceedings | 04.12.1991 | Despatch of a communication from the examining division (Time limit: M04) | 04.12.1991 | Minutes of oral proceedings despatched | 14.04.1992 | Reply to a communication from the examining division | 07.10.1992 | Despatch of communication of intention to grant (Approval: Yes) | 18.01.1993 | Communication of intention to grant the patent | 14.04.1993 | Fee for grant paid | 14.04.1993 | Fee for publishing/printing paid | Opposition(s) | 22.04.1994 | No opposition filed within time limit [1994/28] | Fees paid | Renewal fee | 07.03.1988 | Renewal fee patent year 03 | 13.03.1989 | Renewal fee patent year 04 | 15.03.1990 | Renewal fee patent year 05 | 17.12.1990 | Renewal fee patent year 06 | 13.03.1992 | Renewal fee patent year 07 | 09.03.1993 | Renewal fee patent year 08 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [XP]EP0141207 (SIEMENS AG [DE]); | [X]EP0051500 ; | [Y]EP0097379 (TOKYO SHIBAURA ELECTRIC CO [JP]); | [Y]EP0034341 (TOKYO SHIBAURA ELECTRIC CO [JP]) | Examination | US3762966 | - W.C. Till and J.T. Luxon, "Integrated Circuits ; Materials, Devices and Fabrication", (Prentice-Hall, Englewood Cliffs, 1982), pp. 170, 171. | - S.M. Sze, "Physics of Semiconductor Devices, Second Edition", (J. Wiley & Sons, New York, 1981), pp. 156-169. | - I. Ruge, "Halbleiter-Technologie, 2. Auflage", (Springer, Berlin, 1984), pp. 116, 117, 126, 127. |