-
EP0197454
European procedure
Extract from the Register of European Patents
EP About this file: EP0197454
| EP0197454 - Method for making semiconductor devices comprising insulating regions [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 02.06.1994 Database last updated on 14.11.2024 | Most recent event Tooltip | 02.06.1994 | No opposition filed within time limit | published on 20.07.1994 [1994/29] | Applicant(s) | For all designated states Matsushita Electronics Corporation 1006, Oaza-Kadoma Kadoma-shi Osaka 571-8501 / JP | [N/P] |
| Former [1986/42] | For all designated states Matsushita Electronics Corporation 1006, Oaza-Kadoma Kadoma-shi, Osaka 571 / JP | Inventor(s) | 01 /
Takebayashi, Koji 35-15, Higashiyosumi 1-chome Takatsuki City, 569 / JP | [1986/42] | Representative(s) | advotec. Patent- und Rechtsanwaltspartnerschaft Tappe mbB Widenmayerstraße 4 80538 München / DE | [N/P] |
| Former [1986/42] | Dr. Elisabeth Jung Dr. Jürgen Schirdewahn Dipl.-Ing. Claus Gernhardt Postfach 40 14 68 D-80714 München / DE | Application number, filing date | 86104272.9 | 27.03.1986 | [1986/42] | Priority number, date | JP19850068727 | 01.04.1985 Original published format: JP 6872785 | [1986/42] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0197454 | Date: | 15.10.1986 | Language: | EN | [1986/42] | Type: | A3 Search report | No.: | EP0197454 | Date: | 07.11.1990 | Language: | EN | [1990/45] | Type: | B1 Patent specification | No.: | EP0197454 | Date: | 28.07.1993 | Language: | EN | [1993/30] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 18.09.1990 | Classification | IPC: | H01L21/76, H01L21/316 | [1990/49] | CPC: |
H01L21/02164 (EP,US);
H01L21/0217 (EP,US);
H01L21/022 (EP,US);
H01L21/02216 (EP,US);
H01L21/02255 (EP,US);
H01L21/316 (US);
H01L21/76216 (EP,US);
H01L29/0638 (EP,US);
Y10S148/07 (EP,US);
|
| Former IPC [1986/42] | H01L21/316, H01L21/76 | Designated contracting states | DE, FR, GB [1986/42] | Title | German: | Verfahren zur Herstellung von Halbleiteranordnungen mit Isolationszonen | [1986/42] | English: | Method for making semiconductor devices comprising insulating regions | [1986/42] | French: | Procédé de fabrication de dispositifs semi-conducteurs comportant des régions d'isolation | [1986/42] | Examination procedure | 10.12.1990 | Examination requested [1991/06] | 05.04.1991 | Despatch of a communication from the examining division (Time limit: M06) | 14.10.1991 | Reply to a communication from the examining division | 16.07.1992 | Despatch of communication of intention to grant (Approval: Yes) | 03.11.1992 | Communication of intention to grant the patent | 18.01.1993 | Fee for grant paid | 18.01.1993 | Fee for publishing/printing paid | Opposition(s) | 29.04.1994 | No opposition filed within time limit [1994/29] | Fees paid | Renewal fee | 29.03.1988 | Renewal fee patent year 03 | 28.03.1989 | Renewal fee patent year 04 | 28.03.1990 | Renewal fee patent year 05 | 27.12.1990 | Renewal fee patent year 06 | 30.03.1992 | Renewal fee patent year 07 | 29.03.1993 | Renewal fee patent year 08 |
| Opt-out from the exclusive Tooltip competence of the Unified Patent Court | See the Register of the Unified Patent Court for opt-out data | ||
| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]JP59124737 ; | [A]JP59063741 ; | [A]US4088516 (KONDO HIROYUKI, et al); | [A]GB2123605 (STANDARD MICROSYST SMC) | [A] - PATENT ABSTRACTS OF JAPAN vol. 8, no. 247 (E-278)(1684) 13 November 1984, & JP-A-59 124737 (MATSUSHITA.) 18 July 1984,, & JP59124737 A 19840718 | [A] - PATENT ABSTRACTS OF JAPAN vol. 8, no. 167 (E-258)(1604) 02 August 1984, & JP-A-59 063741 (MATSUSHITA.) 11 April 1984,, & JP59063741 A 19840411 |