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EP0188378
European procedure
Extract from the Register of European Patents
EP About this file: EP0188378
| EP0188378 - Semiconductor circuit device [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 12.01.1991 Database last updated on 13.09.2024 | Most recent event Tooltip | 12.01.1991 | No opposition filed within time limit | published on 06.03.1991 [1991/10] | Applicant(s) | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi Kanagawa 211 / JP | [N/P] |
| Former [1986/30] | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi, Kanagawa 211 / JP | Inventor(s) | 01 /
Miyashita, Takumi Hiraojutaku 42-104 372, Hirao Inagi-shi Tokyo 192-02 / JP | [1986/30] | Representative(s) | Bedggood, Guy Stuart, et al Haseltine Lake & Co., Imperial House, 15-19 Kingsway London WC2B 6UD / GB | [N/P] |
| Former [1986/30] | Bedggood, Guy Stuart, et al Haseltine Lake & Co. Hazlitt House 28 Southampton Buildings Chancery Lane London WC2A 1AT / GB | Application number, filing date | 86300240.8 | 15.01.1986 | [1986/30] | Priority number, date | JP19850005333 | 16.01.1985 Original published format: JP 533385 | [1986/30] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0188378 | Date: | 23.07.1986 | Language: | EN | [1986/30] | Type: | A3 Search report | No.: | EP0188378 | Date: | 26.11.1986 | Language: | EN | [1986/48] | Type: | B1 Patent specification | No.: | EP0188378 | Date: | 21.03.1990 | Language: | EN | [1990/12] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 07.10.1986 | Classification | IPC: | G05F3/20 | [1986/30] | CPC data not yet available | Designated contracting states | DE, FR, GB [1986/30] | Title | German: | Halbleiterkreiseinrichtung | [1986/30] | English: | Semiconductor circuit device | [1986/30] | French: | Dispositif à circuit semi-conducteur | [1986/30] | File destroyed: | 15.01.2000 | Examination procedure | 17.12.1986 | Examination requested [1987/07] | 18.07.1988 | Despatch of a communication from the examining division (Time limit: M06) | 31.01.1989 | Reply to a communication from the examining division | 28.06.1989 | Despatch of communication of intention to grant (Approval: Yes) | 05.09.1989 | Communication of intention to grant the patent | 20.10.1989 | Fee for grant paid | 20.10.1989 | Fee for publishing/printing paid | Opposition(s) | 22.12.1990 | No opposition filed within time limit [1991/10] | Fees paid | Renewal fee | 08.01.1988 | Renewal fee patent year 03 | 03.01.1989 | Renewal fee patent year 04 | 10.01.1990 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [X]JP5739566 ; | [A]US3794862 (JENNE F); | [X]EP0024903 (FUJITSU LTD [JP]) | [X] - PATENTS ABSTRACTS OF JAPAN, vol. 6, no. 107 (E-113)[985], 17th June 1982; & JP - A - 57 39 566 (TOKYO SHIBAURA DENKI K.K.) 04-03-1982, & JP5739566 A 00000000 | [A] - IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. SC-15, no. 5, October 1980, pages 839-846, IEEE, New York, US; J.Y. CHAN et al.: "A 100 ns 5 V only 64K x 1 MOS dynamic RAM" |