EP0190077 - A package structure for a semiconductor chip [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 10.02.1994 Database last updated on 31.08.2024 | Most recent event Tooltip | 10.02.1994 | No opposition filed within time limit | published on 30.03.1994 [1994/13] | Applicant(s) | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi Kanagawa 211 / JP | [N/P] |
Former [1986/32] | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi, Kanagawa 211 / JP | Inventor(s) | 01 /
Fukaya, Jun 1-33-14, Takadanobaba Shinjuku-ku Tokyo 160 / JP | [1986/32] | Representative(s) | Descourtieux, Philippe, et al Cabinet Beau de Loménie 158, rue de l'Université 75340 Paris Cédex 07 / FR | [N/P] |
Former [1986/32] | Descourtieux, Philippe, et al Cabinet Beau de Loménie 158, rue de l'Université F-75340 Paris Cédex 07 / FR | Application number, filing date | 86400160.7 | 28.01.1986 | [1986/32] | Priority number, date | JP19850015904 | 30.01.1985 Original published format: JP 1590485 | JP19850207503 | 19.09.1985 Original published format: JP 20750385 | JP19850142994U | 19.09.1985 Original published format: JP 14299485 U | [1986/32] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0190077 | Date: | 06.08.1986 | Language: | EN | [1986/32] | Type: | A3 Search report | No.: | EP0190077 | Date: | 06.05.1987 | Language: | EN | [1987/19] | Type: | B1 Patent specification | No.: | EP0190077 | Date: | 07.04.1993 | Language: | EN | [1993/14] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 16.03.1987 | Classification | IPC: | H01L23/04 | [1986/32] | CPC: |
H01L23/057 (EP,US);
H01L23/02 (KR);
H01L23/06 (KR);
H01L23/66 (EP,US);
H01L2224/48247 (EP,US);
H01L2224/49175 (EP,US);
H01L24/48 (EP,US);
H01L24/49 (EP,US);
H01L2924/00014 (EP,US);
H01L2924/01057 (EP,US);
H01L2924/01079 (EP,US);
H01L2924/1306 (EP,US);
| C-Set: |
H01L2224/49175, H01L2224/48247, H01L2924/00 (EP,US);
H01L2924/00014, H01L2224/45099 (US,EP);
H01L2924/1306, H01L2924/00 (US,EP)
| Designated contracting states | DE, FR, GB, IT [1986/32] | Title | German: | Packungsstruktur für einen Halbleiterchip | [1986/32] | English: | A package structure for a semiconductor chip | [1986/32] | French: | Structure d'empaquetage pour une puce semi-conductrice | [1986/32] | Examination procedure | 20.10.1987 | Examination requested [1987/52] | 07.06.1989 | Despatch of a communication from the examining division (Time limit: M06) | 06.12.1989 | Reply to a communication from the examining division | 19.07.1990 | Despatch of a communication from the examining division (Time limit: M04) | 24.08.1990 | Reply to a communication from the examining division | 28.11.1990 | Despatch of a communication from the examining division (Time limit: M04) | 18.03.1991 | Reply to a communication from the examining division | 06.05.1992 | Despatch of communication of intention to grant (Approval: No) | 07.08.1992 | Despatch of communication of intention to grant (Approval: later approval) | 14.08.1992 | Communication of intention to grant the patent | 17.09.1992 | Fee for grant paid | 17.09.1992 | Fee for publishing/printing paid | Opposition(s) | 08.01.1994 | No opposition filed within time limit [1994/13] | Fees paid | Renewal fee | 18.01.1988 | Renewal fee patent year 03 | 18.01.1989 | Renewal fee patent year 04 | 18.01.1990 | Renewal fee patent year 05 | 27.12.1990 | Renewal fee patent year 06 | 18.01.1992 | Renewal fee patent year 07 | 18.01.1993 | Renewal fee patent year 08 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]US3502786 (STOLL MILTON); | [A]US3893193 (ANAZAWA SHINZO, et al); | [A]EP0018174 (FUJITSU LTD [JP]); | [A]US4297722 (NAGAHAMA TSUTOMU, et al); | [A]EP0110997 (FUJITSU LTD [JP]) | [A] - IBM TECHNICAL DISCLOSURE BULLETIN, vol. 18, no. 7, December 1975, pages 2220,2221, New York, US; D.E. DeBAR et al.: "Module spark gap" |