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EP0263318
European procedure
Extract from the Register of European Patents
EP About this file: EP0263318
| EP0263318 - Semiconductor memory [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 24.12.1993 Database last updated on 21.08.2024 | Most recent event Tooltip | 24.12.1993 | No opposition filed within time limit | published on 16.02.1994 [1994/07] | Applicant(s) | For all designated states Kabushiki Kaisha Toshiba 72, Horikawa-cho, Saiwai-ku Kawasaki-shi Kanagawa-ken 210-8572 / JP | [N/P] |
| Former [1988/15] | For all designated states KABUSHIKI KAISHA TOSHIBA 72, Horikawa-cho, Saiwai-ku Kawasaki-shi, Kanagawa-ken 210, Tokyo / JP | Inventor(s) | 01 /
Saeki, Yukihiro c/o Patent Division Kabushiki Kaisha Toshiba 1-1 Shibaura 1-chome Minato-ku Tokyo 105 / JP | 02 /
Nakamura, Toshimasa c/o Patent Division Kabushiki Kaisha Toshiba 1-1 Shibaura 1-chome Minato-ku Tokyo 105 / JP | [1988/15] | Representative(s) | Lehn, Werner, et al Hoffmann Eitle, Patent- und Rechtsanwälte, Postfach 81 04 20 81904 München / DE | [N/P] |
| Former [1988/15] | Lehn, Werner, Dipl.-Ing., et al Hoffmann, Eitle & Partner, Patentanwälte, Postfach 81 04 20 D-81904 München / DE | Application number, filing date | 87113251.0 | 10.09.1987 | [1988/15] | Priority number, date | JP19860231721 | 30.09.1986 Original published format: JP 23172186 | JP19860231803 | 30.09.1986 Original published format: JP 23180386 | [1988/15] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0263318 | Date: | 13.04.1988 | Language: | EN | [1988/15] | Type: | A3 Search report | No.: | EP0263318 | Date: | 12.12.1990 | Language: | EN | [1990/50] | Type: | B1 Patent specification | No.: | EP0263318 | Date: | 24.02.1993 | Language: | EN | [1993/08] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 23.10.1990 | Classification | IPC: | G11C16/02 | [1993/08] | CPC: |
G11C16/0416 (EP,US)
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| Former IPC [1988/15] | G11C17/00 | Designated contracting states | DE, FR, GB [1988/15] | Title | German: | Halbleiterspeicher | [1988/15] | English: | Semiconductor memory | [1988/15] | French: | Mémoire à semi-conducteurs | [1988/15] | Examination procedure | 10.09.1987 | Examination requested [1988/15] | 26.06.1991 | Despatch of a communication from the examining division (Time limit: M06) | 07.01.1992 | Reply to a communication from the examining division | 24.04.1992 | Despatch of communication of intention to grant (Approval: Yes) | 27.08.1992 | Communication of intention to grant the patent | 23.09.1992 | Fee for grant paid | 23.09.1992 | Fee for publishing/printing paid | Opposition(s) | 25.11.1993 | No opposition filed within time limit [1994/07] | Fees paid | Renewal fee | 11.09.1989 | Renewal fee patent year 03 | 21.09.1990 | Renewal fee patent year 04 | 09.09.1991 | Renewal fee patent year 05 | 15.09.1992 | Renewal fee patent year 06 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [Y]JP61097976 ; | [Y]EP0050005 (TOKYO SHIBAURA ELECTRIC CO [JP]); | [X]US4387444 (EDWARDS COLIN W [GB]) | [Y] - PATENT ABSTRACTS OF JAPAN, vol. 10, no. 275 (E-438), 18th September 1986; & JP-A-61 097 976 (HITACHI LTD) 16-05-1986, & JP61097976 A 00000000 | [Y] - 1978 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, DIGEST OF TECHNICAL PAPERS, 16th February 1978, pages 106-107; Y.-F. CHAN: "A 4K CMOS erasable PROM" |