EP0273715 - Method for forming metal layer for a semiconductor device [Right-click to bookmark this link] | |||
Former [1988/27] | Method for forming metal layer and semiconductor device formed thereby | ||
[1994/28] | Status | No opposition filed within time limit Status updated on 18.05.1995 Database last updated on 21.09.2024 | Most recent event Tooltip | 18.05.1995 | No opposition filed within time limit | published on 05.07.1995 [1995/27] | Applicant(s) | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi Kanagawa 211 / JP | For all designated states FUJITSU VLSI LIMITED 1844-2, Kozoji-cho 2-chome Kasugai-shi Aichi 487 / JP | [N/P] |
Former [1988/27] | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi, Kanagawa 211 / JP | ||
For all designated states FUJITSU VLSI LIMITED 1844-2, Kozoji-cho 2-chome Kasugai-shi Aichi 487 / JP | Inventor(s) | 01 /
Inoue, Minoru Hainesu Mizonokuchi 213 418-1, Hisamoto Takatsu-ku Kawasaki-shi Kanagawa 213 / JP | 02 /
Hashizume, Kouzi Fujitsu Dai 11 Nakahara Ryo 923, Shimokodanaka Nakahara-ku Kawasaki-shi Kanagawa 211 / JP | [1988/27] | Representative(s) | Rackham, Stephen Neil, et al Gill Jennings & Every LLP Broadgate House 7 Eldon Street London EC2M 7LH / GB | [N/P] |
Former [1988/27] | Rackham, Stephen Neil, et al GILL JENNINGS & EVERY, Broadgate House, 7 Eldon Street London EC2M 7LH / GB | Application number, filing date | 87311389.8 | 23.12.1987 | [1988/27] | Priority number, date | JP19860307979 | 25.12.1986 Original published format: JP 30797986 | [1988/27] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0273715 | Date: | 06.07.1988 | Language: | EN | [1988/27] | Type: | A3 Search report | No.: | EP0273715 | Date: | 08.02.1989 | Language: | EN | [1989/06] | Type: | B1 Patent specification | No.: | EP0273715 | Date: | 13.07.1994 | Language: | EN | [1994/28] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 22.12.1988 | Classification | IPC: | H01L21/31 | [1988/27] | CPC: |
H01L21/32051 (EP,US);
H01L21/283 (KR)
| Designated contracting states | DE, FR, GB [1988/27] | Title | German: | Verfahren zur Herstellung eines Halbleiterbauelementes durch Auftragen einer Metallschicht | [1994/28] | English: | Method for forming metal layer for a semiconductor device | [1994/28] | French: | Procédé de fabrication d'un dispositif semi-conducteur par déposition d'une couche métallique | [1994/28] |
Former [1988/27] | Halbleiterbauelement und Verfahren zu seiner Herstellung beim Auftragen einer Metallschicht | ||
Former [1988/27] | Method for forming metal layer and semiconductor device formed thereby | ||
Former [1988/27] | Dispositif semi-conducteur et son procédé de fabrication par déposition d'une couche métallique | Examination procedure | 26.07.1989 | Examination requested [1989/38] | 30.08.1991 | Despatch of a communication from the examining division (Time limit: M04) | 12.12.1991 | Reply to a communication from the examining division | 30.04.1992 | Despatch of a communication from the examining division (Time limit: M06) | 05.11.1992 | Reply to a communication from the examining division | 09.08.1993 | Despatch of communication of intention to grant (Approval: Yes) | 21.12.1993 | Communication of intention to grant the patent | 15.03.1994 | Fee for grant paid | 15.03.1994 | Fee for publishing/printing paid | Opposition(s) | 14.04.1995 | No opposition filed within time limit [1995/27] | Fees paid | Renewal fee | 18.12.1989 | Renewal fee patent year 03 | 11.12.1990 | Renewal fee patent year 04 | 09.12.1991 | Renewal fee patent year 05 | 11.12.1992 | Renewal fee patent year 06 | 13.12.1993 | Renewal fee patent year 07 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | DE | 14.10.1994 | [1995/15] | Documents cited: | Search | [A]US3620837 (LEFF JERRY, et al) | [A] - SOLID STATE TECHNOLOGY, vol. 22, no. 12, December 1979, pages 66-72, Washington, US; L.D.HARTSOUGH et al.: "Aluminum and aluminum alloy sputter deposition for VLSI" |