Extract from the Register of European Patents

EP About this file: EP0348539

EP0348539 - Programmable CMOS logic array [Right-click to bookmark this link]
StatusThe application has been withdrawn
Status updated on  17.06.1992
Database last updated on 14.03.2026
Most recent event   Tooltip17.06.1992Withdrawal of applicationpublished on 05.08.1992 [1992/32]
Applicant(s)For all designated states
Deutsche ITT Industries GmbH
Hans-Bunte-Strasse 19
79108 Freiburg / DE
[N/P]
Former [1990/01]For all designated states
Deutsche ITT Industries GmbH
Hans-Bunte-Strasse 19
D-79108 Freiburg / DE
Inventor(s)01 / Caesar, Knut Dipl.-Ing.
Ettenheimer Str. 16
D-7800 Freiburg i. Br. / DE
02 / Häringer, Helmut Dipl.-Ing
Oberdorfstr. 14
D-7809 Niederwinden / DE
[1990/01]
Application number, filing date88110267.728.06.1988
[1990/01]
Filing languageDE
Procedural languageDE
PublicationType: A1 Application with search report 
No.:EP0348539
Date:03.01.1990
Language:DE
[1990/01]
Search report(s)(Supplementary) European search report - dispatched on:EP21.03.1989
ClassificationIPC:H03K19/177, H03K5/14
[1990/01]
CPC:
H03K5/14 (EP,US); G11C7/22 (EP,US); H03K19/1772 (EP,US)
Designated contracting statesDE,   FR,   NL [1990/01]
TitleGerman:Programmierbares CMOS-Logik-Feld[1990/01]
English:Programmable CMOS logic array[1990/01]
French:Réseau logique programmable CMOS[1990/01]
File destroyed:12.06.1999
Examination procedure30.06.1990Examination requested  [1990/40]
11.02.1992Despatch of a communication from the examining division (Time limit: M04)
13.06.1992Application withdrawn by applicant  [1992/32]
Fees paidRenewal fee
13.06.1990Renewal fee patent year 03
20.12.1990Renewal fee patent year 04
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Documents cited:Search[A] JP61101124  
 [A]   PATENT ABSTRACTS OF JAPAN, Band 10, Nr. 283, (E-440)[2339]; & JP-A-61 101 124 (HITACHI MICRO COMPUT ENG LTD) 20-05-1986 [A]
 [AP]   N.H.E. WESTE et al.: "Principles of CMOS VLSI design", 1985, Seiten 372-373; Addison-Wesley Publishing Co., Reading, Mass., US [AP]
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