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Extract from the Register of European Patents

EP About this file: EP0310087

EP0310087 - Semiconductor device having bipolar transistor with trench [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  23.03.1995
Database last updated on 02.09.2024
Most recent event   Tooltip23.03.1995No opposition filed within time limitpublished on 10.05.1995 [1995/19]
Applicant(s)For all designated states
NEC Corporation
7-1, Shiba 5-chome Minato-ku
Tokyo 108-8001 / JP
[N/P]
Former [1989/14]For all designated states
NEC CORPORATION
7-1, Shiba 5-chome Minato-ku
Tokyo / JP
Inventor(s)01 / Ohi, Susumu c/o NEC Corporation
33-1, Shiba 5-chome
Minato-ku Tokyo / JP
02 / Nakamae, Masahiko c/o NEC Corporation
33-1, Shiba 5-chome
Minato-ku Tokyo / JP
03 / Shiba, Hiroshi c/o NEC Corporation
33-1, Shiba 5-chome
Minato-ku Tokyo / JP
[1989/14]
Representative(s)Glawe, Delfs, Moll
Partnerschaft mbB von
Patent- und Rechtsanwälten
Postfach 26 01 62
80058 München / DE
[N/P]
Former [1989/14]Glawe, Delfs, Moll & Partner
Patentanwälte Postfach 26 01 62
D-80058 München / DE
Application number, filing date88116120.229.09.1988
[1989/14]
Priority number, dateJP1987024717529.09.1987         Original published format: JP 24717587
[1989/14]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0310087
Date:05.04.1989
Language:EN
[1989/14]
Type: A3 Search report 
No.:EP0310087
Date:13.12.1989
Language:EN
[1989/50]
Type: B1 Patent specification 
No.:EP0310087
Date:18.05.1994
Language:EN
[1994/20]
Search report(s)(Supplementary) European search report - dispatched on:EP24.10.1989
ClassificationIPC:H01L29/06, H01L29/73
[1994/20]
CPC:
H01L29/66272 (EP,US); H01L21/743 (EP,US); H01L29/41708 (EP,US);
H01L29/42304 (EP,US)
Former IPC [1989/14]H01L29/06, H01L29/72
Designated contracting statesDE,   FR,   GB [1989/14]
TitleGerman:Halbleiteranordnung mit einem Trench-Bipolartransistor[1989/14]
English:Semiconductor device having bipolar transistor with trench[1989/14]
French:Dispositif semi-conducteur ayant un transistor bipolaire avec rainure[1989/14]
Examination procedure29.09.1988Examination requested  [1989/14]
12.10.1992Despatch of a communication from the examining division (Time limit: M06)
21.04.1993Reply to a communication from the examining division
09.07.1993Despatch of communication of intention to grant (Approval: Yes)
22.11.1993Communication of intention to grant the patent
18.02.1994Fee for grant paid
18.02.1994Fee for publishing/printing paid
Opposition(s)21.02.1995No opposition filed within time limit [1995/19]
Fees paidRenewal fee
19.09.1990Renewal fee patent year 03
18.09.1991Renewal fee patent year 04
22.09.1992Renewal fee patent year 05
21.09.1993Renewal fee patent year 06
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Documents cited:Search[A]JP60241261  ;
 [A]JP61127169  ;
 [A]WO8503597  (ADVANCED MICRO DEVICES INC [US]);
 [A]DE2621165  (ITT IND GMBH DEUTSCHE)
 [A]  - PATENT ABSTRACTS OF JAPAN, vol. 10, no. 99 (E-396) (2156) 16th April 1986; & JP-A-60 241 261 (HITACHI SEISAKUSHO K.K.) 30-11-1985, & JP60241261 A 00000000
 [A]  - PATENT ABSTRACTS OF JAPAN, vol. 10, no. 317 (E-449) (2373) 28th October 1986; & JP-A-61 127 169 (SONY CORP.) 14-06-1986, & JP61127169 A 00000000
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.