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EP0321702
European procedure
Extract from the Register of European Patents
EP About this file: EP0321702
| EP0321702 - A circuit for holding a MOS transistor in a conduction state in a voltage supply outage situation [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 13.08.1994 Database last updated on 14.09.2024 | Most recent event Tooltip | 13.08.1994 | No opposition filed within time limit | published on 05.10.1994 [1994/40] | Applicant(s) | For all designated states STMicroelectronics Srl Via C. Olivetti, 2 20041 Agrate Brianza (Milano) / IT | [N/P] |
| Former [1989/26] | For all designated states SGS-THOMSON MICROELECTRONICS S.r.l. Via C. Olivetti, 2 I-20041 Agrate Brianza (Milano) / IT | Inventor(s) | 01 /
Rossi, Domenico Via Roma, 161 I-27024 Cilavegna Pavia / IT | 02 /
Pietrobon, Giovanni Via Bellegambe, 7 I-31100 Treviso / IT | 03 /
Storti, Sandro Via F.lli Bandiera, 48 I-20099 Sesto San Giovanni Milan / IT | 04 /
Cini, Carlo Via Aristotele, 15 I-20010 Cornaredo Milan / IT | [1989/26] | Representative(s) | Perani, Aurelio, et al c/o JACOBACCI & PERANI S.p.A. Via Visconti di Modrone, 7 I-20122 Milano / IT | [N/P] |
| Former [1989/26] | Perani, Aurelio, et al c/o JACOBACCI & PERANI S.p.A. Via Visconti di Modrone, 7 I-20122 Milano / IT | Application number, filing date | 88119207.4 | 18.11.1988 | [1989/26] | Priority number, date | IT19870023162 | 22.12.1987 Original published format: IT 2316287 | [1989/26] | Filing language | IT | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0321702 | Date: | 28.06.1989 | Language: | EN | [1989/26] | Type: | A3 Search report | No.: | EP0321702 | Date: | 22.08.1990 | Language: | EN | [1990/34] | Type: | B1 Patent specification | No.: | EP0321702 | Date: | 13.10.1993 | Language: | EN | [1993/41] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 03.07.1990 | Classification | IPC: | H03K17/24, H03K17/06 | [1989/26] | CPC: |
H03K17/24 (EP,US);
H03K17/063 (EP,US)
| Designated contracting states | DE, FR, GB, NL, SE [1989/26] | Title | German: | Schaltung, um einen MOS-Transistor bei Ausfall der Versorgungsspannung im leitenden Zustand zu halten | [1989/26] | English: | A circuit for holding a MOS transistor in a conduction state in a voltage supply outage situation | [1989/26] | French: | Circuit pour maintenir un transistor MOS à l'état conducteur en cas de défaillance de la tension d'alimentation | [1989/26] | Examination procedure | 26.09.1990 | Examination requested [1990/49] | 25.02.1992 | Despatch of a communication from the examining division (Time limit: M06) | 31.07.1992 | Reply to a communication from the examining division | 03.12.1992 | Despatch of communication of intention to grant (Approval: Yes) | 15.04.1993 | Communication of intention to grant the patent | 19.05.1993 | Fee for grant paid | 19.05.1993 | Fee for publishing/printing paid | Opposition(s) | 14.07.1994 | No opposition filed within time limit [1994/40] | Fees paid | Renewal fee | 13.11.1990 | Renewal fee patent year 03 | 11.10.1991 | Renewal fee patent year 04 | 19.10.1992 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A] - IBM TECHNICAL DISCLOSURE BULLETIN vol. 10, no. 3, 3 August 1967, pages 339 - 340; C.A. WALTON: "Analog voltage storage with storage protection" | Examination | EP0236967 | EP0246361 |