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EP0320711
European procedure
Extract from the Register of European Patents
EP About this file: EP0320711
| EP0320711 - Antibounce circuit for digital circuits [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 08.10.1992 Database last updated on 28.03.2026 | Most recent event Tooltip | 08.10.1992 | No opposition filed within time limit | published on 25.11.1992 [1992/48] | Applicant(s) | For all designated states STMicroelectronics Srl Via C. Olivetti, 2 20041 Agrate Brianza (Milano) / IT | [N/P] |
| Former [1989/25] | For all designated states SGS-THOMSON MICROELECTRONICS S.r.l. Via C. Olivetti, 2 I-20041 Agrate Brianza (Milano) / IT | Inventor(s) | 01 /
Confalonieri, Pierangelo 6, Via Bergamo Canonica D'Adda Bergamo / IT | 02 /
Pernici, Sergio 47, Viale V. Emanuele I-24100 Bergamo / IT | 03 /
Nicollini, Germano 6, Via Pavesi I-29100 Piacenza / IT | [1989/25] | Representative(s) | Forattini, Amelia, et al Internazionale Brevetti Ingg. ZINI, MARANESI & C. S.r.l. Piazza Castello 1 20121 Milano / IT | [N/P] |
| Former [1991/25] | Forattini, Amelia, et al c/o Internazionale Brevetti Ingg. ZINI, MARANESI & C. S.r.l. Piazza Castello 1 I-20121 Milano / IT | ||
| Former [1989/25] | Garrone, Fernando Internazionale Brevetti s.r.l. Via Brentano 2 I-20121 Milano / IT | Application number, filing date | 88120115.6 | 02.12.1988 | [1989/25] | Priority number, date | IT19870022987 | 14.12.1987 Original published format: IT 2298787 | [1989/25] | Filing language | IT | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0320711 | Date: | 21.06.1989 | Language: | EN | [1989/25] | Type: | A3 Search report | No.: | EP0320711 | Date: | 27.09.1989 | Language: | EN | [1989/39] | Type: | B1 Patent specification | No.: | EP0320711 | Date: | 04.12.1991 | Language: | EN | [1991/49] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 10.08.1989 | Classification | IPC: | H03K5/01 | [1989/25] | CPC: |
H03K5/1252 (EP,US)
| Designated contracting states | DE, FR, GB, NL, SE [1989/25] | Title | German: | Entprellschaltung für digitale Schaltkreise | [1989/25] | English: | Antibounce circuit for digital circuits | [1989/25] | French: | Circuit antirebond pour circuits numériques | [1989/25] | Examination procedure | 07.03.1990 | Examination requested [1990/20] | 31.08.1990 | Despatch of a communication from the examining division (Time limit: M04) | 13.12.1990 | Reply to a communication from the examining division | 07.03.1991 | Despatch of communication of intention to grant (Approval: Yes) | 31.05.1991 | Communication of intention to grant the patent | 24.07.1991 | Fee for grant paid | 24.07.1991 | Fee for publishing/printing paid | Opposition(s) | 05.09.1992 | No opposition filed within time limit [1992/48] | Fees paid | Renewal fee | 12.12.1990 | Renewal fee patent year 03 | 14.11.1991 | Renewal fee patent year 04 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [X] JP56007520 | [X] PATENT ABSTRACTS OF JAPAN, Vol. 5, No. 55 (E-52)[727], 16th April 1981; & JP-A-56 007 520 (MITSUBISHI DENKI K.K.) 26-01-1981 [X] | [A] NEW ELECTRONICS, Vol. 17, No. 11, 29th May 1984, Page 22, London, GB; C.E. UNDERY: "Debounce circuit without masking delay" [A] | [A] FUNKSCHAU, vol. 58, no. 18, August 1986, page 65, Mnchen, DE; H. REDELBERGEN: "CMOS-Flipflop-Entprellschaltung" [A] |