-
EP0276110
European procedure
Extract from the Register of European Patents
EP About this file: EP0276110
| EP0276110 - Semiconductor memory device [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 02.02.1996 Database last updated on 03.10.2024 | Most recent event Tooltip | 02.02.1996 | No opposition filed within time limit | published on 20.03.1996 [1996/12] | Applicant(s) | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi Kanagawa 211 / JP | [N/P] |
| Former [1988/30] | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi, Kanagawa 211 / JP | Inventor(s) | 01 /
Ogawa, Junji Berumezon Ichigao 102 1077-11, Ichigao-cho Midori-ku Yokohama-shi Kanagawa 227 / JP | [1988/30] | Representative(s) | Billington, Lawrence Emlyn, et al Haseltine Lake LLP Lincoln House, 5th Floor 300 High Holborn London WC1V 7JH / GB | [N/P] |
| Former [1988/30] | Billington, Lawrence Emlyn, et al HASELTINE LAKE & CO Hazlitt House 28 Southampton Buildings Chancery Lane London WC2A 1AT / GB | Application number, filing date | 88300374.1 | 18.01.1988 | [1988/30] | Priority number, date | JP19870009494 | 19.01.1987 Original published format: JP 949487 | [1988/30] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0276110 | Date: | 27.07.1988 | Language: | EN | [1988/30] | Type: | A3 Search report | No.: | EP0276110 | Date: | 21.08.1991 | Language: | EN | [1991/34] | Type: | B1 Patent specification | No.: | EP0276110 | Date: | 29.03.1995 | Language: | EN | [1995/13] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 04.07.1991 | Classification | IPC: | G06F12/02, G11C8/00, G06F15/64, G09G1/06 | [1991/43] | CPC: |
G11C8/00 (EP,US);
G11C7/00 (KR);
G06F12/0207 (EP,US)
|
| Former IPC [1988/30] | G11C8/00 | Designated contracting states | DE, GB [1994/46] |
| Former [1988/30] | DE, FR, GB | Title | German: | Halbleiterspeicheranordnung | [1988/30] | English: | Semiconductor memory device | [1988/30] | French: | Dispositif de mémoire à semi-conducteurs | [1988/30] | Examination procedure | 11.11.1991 | Examination requested [1992/02] | 29.09.1993 | Despatch of a communication from the examining division (Time limit: M06) | 31.03.1994 | Reply to a communication from the examining division | 21.07.1994 | Despatch of communication of intention to grant (Approval: Yes) | 28.09.1994 | Communication of intention to grant the patent | 22.12.1994 | Fee for grant paid | 22.12.1994 | Fee for publishing/printing paid | Opposition(s) | 30.12.1995 | No opposition filed within time limit [1996/12] | Fees paid | Renewal fee | 10.01.1990 | Renewal fee patent year 03 | 02.01.1991 | Renewal fee patent year 04 | 09.01.1992 | Renewal fee patent year 05 | 13.01.1993 | Renewal fee patent year 06 | 11.01.1994 | Renewal fee patent year 07 | 12.01.1995 | Renewal fee patent year 08 |
| Opt-out from the exclusive Tooltip competence of the Unified Patent Court | See the Register of the Unified Patent Court for opt-out data | ||
| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]EP0130340 (IBM [US]); | [A]US4570236 (REBEL BURGHARD [DD], et al) | [A] - IEEE TRANSACTIONS ON COMPUTERS. vol. C-35, no. 7, July 1986, NEW YORK US pages 669 - 674; JONG WON PARK: 'AN EFFICIENT MEMORY SYSTEM FOR IMAGE PROCESSING ' | [A] - MINI MICRO CONFERENCE RECORD. November 1983, NEW YORK US pages 1 - 3; GUPTA: 'DISPLAY MEMORY ARCHITECTURES ' |