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EP0281235
European procedure
Extract from the Register of European Patents
EP About this file: EP0281235
| EP0281235 - Bipolar transistor fabrication utilizing CMOS techniques [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 19.05.1994 Database last updated on 03.09.2024 | Most recent event Tooltip | 19.05.1994 | No opposition filed within time limit | published on 06.07.1994 [1994/27] | Applicant(s) | For all designated states Texas Instruments Incorporated 13500 North Central Expressway Dallas, Texas 75265 / US | [N/P] |
| Former [1988/36] | For all designated states TEXAS INSTRUMENTS INCORPORATED 13500 North Central Expressway Dallas Texas 75265 / US | Inventor(s) | 01 /
Spratt, David 3028 Stanford Drive Plano Texas 75075 / US | 02 /
Shah, Rajiv R. 2116 Newcombe Drive Plano Texas 75075 / US | [1988/36] | Representative(s) | Abbott, David John, et al Abel & Imray 20 Red Lion Street London WC1R 4PQ / GB | [N/P] |
| Former [1988/36] | Abbott, David John, et al Abel & Imray Northumberland House 303-306 High Holborn London, WC1V 7LH / GB | Application number, filing date | 88300586.0 | 25.01.1988 | [1988/36] | Priority number, date | US19870008906 | 30.01.1987 Original published format: US 8906 | [1988/36] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP0281235 | Date: | 07.09.1988 | Language: | EN | [1988/36] | Type: | B1 Patent specification | No.: | EP0281235 | Date: | 14.07.1993 | Language: | EN | [1993/28] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 06.07.1988 | Classification | IPC: | H01L21/82, H01L21/285, H01L27/06, H01L29/72 | [1988/36] | CPC: |
H01L29/66272 (EP);
H01L29/70 (KR);
H01L21/82 (KR);
H01L21/8249 (EP);
H01L29/72 (KR);
H01L29/7322 (EP)
| Designated contracting states | DE, FR, GB, IT, NL, SE [1988/36] | Title | German: | Verfahren zum Herstellen eines bipolaren Transistors unter Verwendung von CMOS-Techniken | [1988/36] | English: | Bipolar transistor fabrication utilizing CMOS techniques | [1988/36] | French: | Procédé pour fabriquer un transistor bipolaire utilisant des technologies de type CMOS | [1988/36] | Examination procedure | 14.02.1989 | Examination requested [1989/15] | 28.05.1991 | Despatch of a communication from the examining division (Time limit: M06) | 03.12.1991 | Reply to a communication from the examining division | 21.08.1992 | Despatch of communication of intention to grant (Approval: Yes) | 15.01.1993 | Communication of intention to grant the patent | 01.03.1993 | Fee for grant paid | 01.03.1993 | Fee for publishing/printing paid | Opposition(s) | 15.04.1994 | No opposition filed within time limit [1994/27] | Fees paid | Renewal fee | 12.01.1990 | Renewal fee patent year 03 | 02.01.1991 | Renewal fee patent year 04 | 21.01.1992 | Renewal fee patent year 05 | 25.01.1993 | Renewal fee patent year 06 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]EP0170250 (TOSHIBA KK [JP]); | [A]US4492008 (ANANTHA NARASIPUR G [US], et al); | [A]US4536945 (GRAY BRUCE [US], et al); | [A]EP0151347 (TEXAS INSTRUMENTS INC [US]) | [A] - JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, vol. 3, no. 6, November/December 1985, pages 1715-1724, American Vacuum Society, Woodbury, New York, US; Y. KOH et al.: "Self-aligned TiSi2 for bipolar applications" |