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Extract from the Register of European Patents

EP About this file: EP0295782

EP0295782 - In-circuit transistor beta test and method [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  17.02.1994
Database last updated on 25.09.2024
Most recent event   Tooltip15.08.2008Change - applicantpublished on 17.09.2008  [2008/38]
Applicant(s)For all designated states
Hewlett-Packard Company
3000 Hanover Street
Palo Alto, CA 94304-1112 / US
[N/P]
Former [2008/38]For all designated states
Hewlett-Packard Company
3000 Hanover Street
Palo Alto CA 94304-1112 / US
Former [1991/02]For all designated states
Hewlett-Packard Company
Mail Stop 20 B-O, 3000 Hanover Street
Palo Alto, California 94304 / US
Former [1990/11]For all designated states
Hewlett-Packard Company
3000 Hanover Street
Palo Alto California 94304 / US
Former [1988/51]For all designated states
HEWLETT PACKARD COMPANY
Legal Department 3000 Hanover Street
Palo Alto, CA 94304 / US
Inventor(s)01 / Peiffer, Ronald J.
512 Parkway Court
Fort Collins Colorado 80525 / US
02 / Crook, David T.
2331 Abeyta Court
Loveland Colorado 80538 / US
[1988/51]
Representative(s)Colgan, Stephen James, et al
CARPMAELS & RANSFORD 43 Bloomsbury Square
London WC1A 2RA / GB
[N/P]
Former [1988/51]Colgan, Stephen James, et al
CARPMAELS & RANSFORD 43 Bloomsbury Square
London WC1A 2RA / GB
Application number, filing date88304253.311.05.1988
[1988/51]
Priority number, dateUS1987006415718.06.1987         Original published format: US 64157
[1988/51]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP0295782
Date:21.12.1988
Language:EN
[1988/51]
Type: B1 Patent specification 
No.:EP0295782
Date:14.04.1993
Language:EN
[1993/15]
Search report(s)(Supplementary) European search report - dispatched on:EP13.10.1988
ClassificationIPC:G01R31/26
[1988/51]
CPC:
G01R31/2614 (EP,US); G01R31/28 (KR)
Designated contracting statesDE,   FR,   GB [1988/51]
TitleGerman:Betatest für einen Transistor in einer Schaltung und Verfahren[1988/51]
English:In-circuit transistor beta test and method[1988/51]
French:Test du bêta d'un transistor sur circuit et procédé[1988/51]
Examination procedure24.02.1989Examination requested  [1989/17]
26.09.1991Despatch of a communication from the examining division (Time limit: M06)
03.04.1992Reply to a communication from the examining division
09.07.1992Despatch of communication of intention to grant (Approval: Yes)
16.10.1992Communication of intention to grant the patent
10.12.1992Fee for grant paid
10.12.1992Fee for publishing/printing paid
Opposition(s)15.01.1994No opposition filed within time limit [1994/14]
Fees paidRenewal fee
30.04.1990Renewal fee patent year 03
12.04.1991Renewal fee patent year 04
15.04.1992Renewal fee patent year 05
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Documents cited:Search[A]  - E.D.N. ELECTRICAL DESIGN NEWS, vol. 28, no. 5, 3rd March 1983, pages 133-134, Boston, Massachusetts, US; D.K. HU: "Test transistor Beta in situ"
 [A]  - IEEE ELECTRON DEVICE LETTERS, vol. EDL-6, no. 5, May 1985, pages 219-220, IEEE, New York, US; R.C. JAEGER et al.: "Direct measurement of the available voltage gain of bipolar and field-effect transistors"
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.