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EP0316082
European procedure
Extract from the Register of European Patents
EP About this file: EP0316082
| EP0316082 - Input/output buffer for an integrated circuit [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 11.06.1994 Database last updated on 13.07.2024 | Most recent event Tooltip | 11.06.1994 | No opposition filed within time limit | published on 03.08.1994 [1994/31] | Applicant(s) | For all designated states Kabushiki Kaisha Toshiba 72, Horikawa-cho, Saiwai-ku Kawasaki-shi Kanagawa-ken 210-8572 / JP | [N/P] |
| Former [1989/20] | For all designated states KABUSHIKI KAISHA TOSHIBA 72, Horikawa-cho, Saiwai-ku Kawasaki-shi, Kanagawa-ken 210, Tokyo / JP | Inventor(s) | 01 /
Ohshima, Shigeo c/o Patent Division Toshiba Corporation Principal Office 1-1, Shibaura 1-chome Minato-ku Tokyo / JP | 02 /
Suzuki, Youichi c/o Patent Division Toshiba Corporation Principal Office 1-1, Shibaura 1-chome Minato-ku Tokyo / JP | 03 /
Segawa, Makoto c/o Patent Division Toshiba Corporation Principal Office 1-1, Shibaura 1-chome Minato-ku Tokyo / JP | [1989/20] | Representative(s) | Sturt, Clifford Mark, et al MARKS & CLERK 57-60 Lincoln's Inn Fields London WC2A 3LS / GB | [N/P] |
| Former [1989/20] | Sturt, Clifford Mark, et al MARKS & CLERK 57-60 Lincoln's Inn Fields London WC2A 3LS / GB | Application number, filing date | 88309939.2 | 21.10.1988 | [1989/20] | Priority number, date | JP19870272111 | 28.10.1987 Original published format: JP 27211187 | [1989/20] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0316082 | Date: | 17.05.1989 | Language: | EN | [1989/20] | Type: | A3 Search report | No.: | EP0316082 | Date: | 27.03.1991 | Language: | EN | [1991/13] | Type: | B1 Patent specification | No.: | EP0316082 | Date: | 11.08.1993 | Language: | EN | [1993/32] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 04.02.1991 | Classification | IPC: | G11C7/00 | [1989/20] | CPC: |
G11C7/1057 (EP,US);
H01L27/00 (KR);
G11C11/34 (KR);
G11C5/063 (EP,US);
G11C5/14 (EP,US);
G11C7/1051 (EP,US);
| Designated contracting states | DE, FR, GB [1989/20] | Title | German: | Eingangs-/Ausgangs-Puffer für eine integrierte Schaltung | [1989/20] | English: | Input/output buffer for an integrated circuit | [1989/20] | French: | Tampon d'entrée et de sortie pour circuit intégré | [1989/20] | Examination procedure | 04.11.1988 | Examination requested [1989/20] | 15.06.1992 | Despatch of a communication from the examining division (Time limit: M04) | 10.09.1992 | Reply to a communication from the examining division | 30.11.1992 | Despatch of communication of intention to grant (Approval: Yes) | 16.02.1993 | Communication of intention to grant the patent | 03.05.1993 | Fee for grant paid | 03.05.1993 | Fee for publishing/printing paid | Opposition(s) | 12.05.1994 | No opposition filed within time limit [1994/31] | Fees paid | Renewal fee | 12.10.1990 | Renewal fee patent year 03 | 10.10.1991 | Renewal fee patent year 04 | 09.10.1992 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]EP0194939 (FUJITSU LTD [JP]); | [A]GB2185649 (MITSUBISHI ELECTRIC CORP) |