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Extract from the Register of European Patents

EP About this file: EP0364961

EP0364961 - Recording error detection circuit and recording/reproducing apparatus [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  19.10.1995
Database last updated on 21.08.2024
Most recent event   Tooltip19.10.1995No opposition filed within time limitpublished on 06.12.1995 [1995/49]
Applicant(s)For all designated states
Sony Corporation
7-35 Kitashinagawa 6-chome
Shinagawa-ku
Tokyo 141 / JP
[N/P]
Former [1990/17]For all designated states
SONY CORPORATION
7-35 Kitashinagawa 6-chome Shinagawa-ku
Tokyo 141 / JP
Inventor(s)01 / Murakami, Yoshihiro
c/o Sony Corporation 7-35, Kitashinagawa 6-chome
Shinagawa-ku Tokyo / JP
[1990/17]
Representative(s)Schmidt-Evers, Jürgen, et al
Mitscherlich PartmbB
Patent- und Rechtsanwälte
Postfach 33 06 09
80066 München / DE
[N/P]
Former [1990/17]Schmidt-Evers, Jürgen, Dipl.-Ing., et al
Patentanwälte Mitscherlich & Partner Postfach 33 06 09
D-80066 München / DE
Application number, filing date89119271.817.10.1989
[1990/17]
Priority number, dateJP1988025959717.10.1988         Original published format: JP 25959788
[1990/17]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0364961
Date:25.04.1990
Language:EN
[1990/17]
Type: A3 Search report 
No.:EP0364961
Date:18.12.1991
Language:EN
[1991/51]
Type: B1 Patent specification 
No.:EP0364961
Date:14.12.1994
Language:EN
[1994/50]
Search report(s)(Supplementary) European search report - dispatched on:EP31.10.1991
ClassificationIPC:G11B20/18, H04N5/94, H04N9/88
[1990/17]
CPC:
G11B20/10 (KR); G11B20/1879 (EP); G11B27/036 (EP);
G11B27/36 (EP); H04N5/945 (EP); G11B2220/90 (EP);
G11B27/032 (EP) (-)
Designated contracting statesDE,   FR,   GB [1990/17]
TitleGerman:Schaltung zur Erkennung von Aufzeichnungsfehlern und Aufzeichnungs- und Wiedergabeeinrichtung[1990/17]
English:Recording error detection circuit and recording/reproducing apparatus[1990/17]
French:Circuit de détection d'erreur d'enregistrement et appareil d'enregistrement et de reproduction[1990/17]
Examination procedure19.06.1992Examination requested  [1992/35]
24.02.1993Despatch of a communication from the examining division (Time limit: M06)
09.07.1993Reply to a communication from the examining division
03.03.1994Despatch of communication of intention to grant (Approval: Yes)
16.06.1994Communication of intention to grant the patent
01.09.1994Fee for grant paid
01.09.1994Fee for publishing/printing paid
Opposition(s)15.09.1995No opposition filed within time limit [1995/49]
Fees paidRenewal fee
28.12.1990Renewal fee patent year 03
28.10.1992Renewal fee patent year 04
29.10.1993Renewal fee patent year 05
08.10.1994Renewal fee patent year 06
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Documents cited:Search[A]JP60000673  ;
 [A]JP61142568  ;
 [A]JP60231982  ;
 [A]US4672483  (KAWADA MICHITAKA [JP])
 [A]  - PATENT ABSTRACTS OF JAPAN vol. 9, no. 113 (P-356)(1836) 17 May 1985 & JP-A-60 000 673 ( MATSUSHITA DENKI SANGYO K. K. ) 5 January 1985, & JP60000673 A 19850105
 [A]  - PATENT ABSTRACTS OF JAPAN vol. 10, no. 341 (P-517)(2397) 18 November 1986 & JP-A-61 142 568 ( PIONEER ELECTRONIC CORP. ) 30 June 1986, & JP61142568 A 19860630
 [A]  - PATENT ABSTRACTS OF JAPAN vol. 10, no. 101 (P-447)(2158) 17 April 1986 & JP-A-60 231 982 ( SONY K. K. ) 18 November 1985, & JP60231982 A 19851118
 [A]  - SMPTE JOURNAL. vol. 97, no. 3, March 1988, US R. BRUSH: 'Design considerations for the D-2 NTSC composite DVTR'
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.