EP0326212 - Chip resistor and method of manufacturing a chip resistor [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 06.05.1993 Database last updated on 14.09.2024 | Most recent event Tooltip | 06.05.1993 | No opposition filed within time limit | published on 23.06.1993 [1993/25] | Applicant(s) | For all designated states Koninklijke Philips Electronics N.V. Groenewoudseweg 1 5621 BA Eindhoven / NL | [N/P] |
Former [1989/31] | For all designated states Philips Electronics N.V. Groenewoudseweg 1 NL-5621 BA Eindhoven / NL | Inventor(s) | 01 /
Caporali, Didier Yves François c/o INT. OCTROOIBUREAU B.V. Prof.Holstlaan 6 NL-5656 AA Eindhoven / NL | 02 /
Geerinckx, Frans Leopold Anna c/o INT. OCTROOIBUREAU B.V. Prof.Holstlaan 6 NL-5656 AA Eindhoven / NL | [1989/31] | Representative(s) | Pennings, Johannes, et al Philips Intellectual Property & Standards P.O. Box 220 5600 AE Eindhoven / NL | [N/P] |
Former [1989/31] | Pennings, Johannes, et al INTERNATIONAAL OCTROOIBUREAU B.V., Prof. Holstlaan 6 NL-5656 AA Eindhoven / NL | Application number, filing date | 89200111.6 | 19.01.1989 | [1989/31] | Priority number, date | NL19880000156 | 25.01.1988 Original published format: NL 8800156 | [1989/31] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP0326212 | Date: | 02.08.1989 | Language: | EN | [1989/31] | Type: | B1 Patent specification | No.: | EP0326212 | Date: | 01.07.1992 | Language: | EN | [1992/27] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 30.05.1989 | Classification | IPC: | H01C13/00, H01C17/00 | [1992/27] | CPC: |
H01C17/006 (EP,US);
Y10T29/49082 (EP,US)
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Former IPC [1989/31] | H01C13/02, H01C17/00 | Designated contracting states | AT, BE, DE, FR, GB, NL [1989/31] | Title | German: | Chipwiderstand und Verfahren zum Herstellen eines Chipwiderstandes | [1989/31] | English: | Chip resistor and method of manufacturing a chip resistor | [1989/31] | French: | Résistance en forme de puce et son procédé de fabrication | [1989/31] | Examination procedure | 31.01.1990 | Examination requested [1990/13] | 07.08.1991 | Despatch of communication of intention to grant (Approval: Yes) | 27.12.1991 | Communication of intention to grant the patent | 21.02.1992 | Fee for grant paid | 21.02.1992 | Fee for publishing/printing paid | Opposition(s) | 02.04.1993 | No opposition filed within time limit [1993/25] | Fees paid | Renewal fee | 29.01.1991 | Renewal fee patent year 03 | 28.01.1992 | Renewal fee patent year 04 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | AT | 01.07.1992 | BE | 01.07.1992 | NL | 01.07.1992 | [1993/16] |
Former [1993/15] | AT | 01.07.1992 | |
NL | 01.07.1992 | ||
Former [1993/14] | NL | 01.07.1992 | Documents cited: | Search | [A]EP0171642 (SIEMENS AG [DE], et al); | [A]US4706060 (MAY JOHN E [US]) |