EP0357461 - Error correction circuit [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 04.10.1996 Database last updated on 22.08.2024 | Most recent event Tooltip | 04.10.1996 | No opposition filed within time limit | published on 20.11.1996 [1996/47] | Applicant(s) | For all designated states MITSUBISHI DENKI KABUSHIKI KAISHA 2-2-3, Marunouchi Chiyoda-ku Tokyo / JP | [N/P] |
Former [1990/10] | For all designated states MITSUBISHI DENKI KABUSHIKI KAISHA 2-2-3, Marunouchi Chiyoda-ku Tokyo / JP | Inventor(s) | 01 /
Yoshida, Hideo c/o Mitsubishi Denki K.K. Jouho Denshi-kenkyusho 1-1 Ofuna 5-chome Kamakura-shi Kanagawa-ken / JP | [1990/10] | Representative(s) | Mounteney, Simon James, et al Marks & Clerk LLP 15 Fetter Lane London EC4A 1BW / GB | [N/P] |
Former [1995/45] | Mounteney, Simon James, et al MARKS & CLERK, 57-60 Lincoln's Inn Fields London WC2A 3LS / GB | ||
Former [1990/10] | Lawson, David Glynne MARKS & CLERK, 57-60 Lincoln's Inn Fields London WC2A 3LS / GB | Application number, filing date | 89308902.9 | 01.09.1989 | [1990/10] | Priority number, date | JP19880218262 | 02.09.1988 Original published format: JP 21826288 | [1990/10] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0357461 | Date: | 07.03.1990 | Language: | EN | [1990/10] | Type: | A3 Search report | No.: | EP0357461 | Date: | 13.11.1991 | Language: | EN | [1991/46] | Type: | B1 Patent specification | No.: | EP0357461 | Date: | 29.11.1995 | Language: | EN | [1995/48] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 24.09.1991 | Classification | IPC: | H03M13/00, // G11B20/18 | [1990/10] | CPC: |
H03M13/09 (EP,US);
G03G15/00 (KR);
G06F11/10 (KR);
H03M13/15 (EP,US);
H03M13/29 (EP,US)
| Designated contracting states | DE, FR, GB, NL [1990/10] | Title | German: | Fehlerkorrekturschaltung | [1990/10] | English: | Error correction circuit | [1990/10] | French: | Circuit de correction d'erreur | [1990/10] | Examination procedure | 28.12.1990 | Examination requested [1991/10] | 26.01.1995 | Despatch of communication of intention to grant (Approval: Yes) | 31.05.1995 | Communication of intention to grant the patent | 25.08.1995 | Fee for grant paid | 25.08.1995 | Fee for publishing/printing paid | Opposition(s) | 30.08.1996 | No opposition filed within time limit [1996/47] | Fees paid | Renewal fee | 09.09.1991 | Renewal fee patent year 03 | 15.09.1992 | Renewal fee patent year 04 | 16.09.1993 | Renewal fee patent year 05 | 08.09.1994 | Renewal fee patent year 06 | 08.09.1995 | Renewal fee patent year 07 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [Y]EP0229698 (SONY CORP [JP]); | [Y]WO8100316 (CYCLOTOMICS INC); | [A]EP0278700 (SONY CORP [JP]); | [A]EP0156440 (PHILIPS NV [NL]) | [A] - IBM TECHNICAL DISCLOSURE BULLETIN. vol. 22, no. 6, November 1979, NEW YORK US pages 2365 - 2368; C.L. CHEN: "High-speed cyclic redundancy checking scheme for error correcting codes" |