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Extract from the Register of European Patents

EP About this file: EP0361752

EP0361752 - Selective solder formation on printed circuit boards [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  15.07.1995
Database last updated on 05.10.2024
Most recent event   Tooltip15.07.1995No opposition filed within time limitpublished on 06.09.1995 [1995/36]
Applicant(s)For all designated states
AT&T Corp.
32 Avenue of the Americas
New York, NY 10013-2412 / US
[1990/14]
Inventor(s)01 / Durnwirth, Roy Karl, Jr.
5821 Harbour Hill Place
Midlothian Virginia 231122 / US
02 / George, John Emanuel
5805 Tivolli Court
Richmond Virginia 23227 / US
03 / Morton, Kim Leslie
3609 Brook Road
Richmond Virginia 23227 / US
[1990/14]
Representative(s)Johnston, Kenneth Graham, et al
Lucent Technologies EUR-IP UK Ltd Unit 18, Core 3 Workzone Innova Business Park Electric Avenue
Enfield, EN3 7XB / GB
[N/P]
Former [1990/14]Johnston, Kenneth Graham, et al
AT&T (UK) LTD. AT&T Intellectual Property Division 5 Mornington Road
Woodford Green Essex, IG8 OTU / GB
Application number, filing date89309479.719.09.1989
[1990/14]
Priority number, dateUS1988024913326.09.1988         Original published format: US 249133
[1990/14]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0361752
Date:04.04.1990
Language:EN
[1990/14]
Type: A3 Search report 
No.:EP0361752
Date:13.06.1990
Language:EN
[1990/24]
Type: B1 Patent specification 
No.:EP0361752
Date:14.09.1994
Language:EN
[1994/37]
Search report(s)(Supplementary) European search report - dispatched on:EP24.04.1990
ClassificationIPC:H05K3/34, H05K3/24
[1990/22]
CPC:
H05K3/3473 (EP,US); H05K3/062 (EP,US); H05K3/3452 (EP,US);
H05K2201/099 (EP,US); H05K2203/0361 (EP,US); H05K2203/043 (EP,US);
H05K3/108 (EP,US) (-)
Former IPC [1990/14]H05K3/34
Designated contracting statesDE,   FR,   GB,   NL [1990/14]
TitleGerman:Selektive Lötmetallbildung auf Leiterplatten[1990/14]
English:Selective solder formation on printed circuit boards[1990/14]
French:Formation sélective de soudure sur des panneaux de circuits imprimés[1990/14]
Examination procedure04.12.1990Examination requested  [1991/05]
09.10.1992Despatch of a communication from the examining division (Time limit: M04)
08.02.1993Reply to a communication from the examining division
28.09.1993Despatch of communication of intention to grant (Approval: No)
21.01.1994Despatch of communication of intention to grant (Approval: later approval)
31.01.1994Communication of intention to grant the patent
08.04.1994Fee for grant paid
08.04.1994Fee for publishing/printing paid
Opposition(s)15.06.1995No opposition filed within time limit [1995/36]
Fees paidRenewal fee
20.09.1991Renewal fee patent year 03
16.09.1992Renewal fee patent year 04
13.09.1993Renewal fee patent year 05
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Documents cited:Search[Y]US3926699  (DIXON CHARLES H);
 [X]GB2087157  (QUASSIA ELECTRONICS LTD);
 [X]US4487828  (HLADOVCAK RAYMOND C [US], et al);
 [X]EP0252399  (DEUTSCHE TELEPHONWERK KABEL [DE])
 [Y]  - METALLOBERFLAECHE, vol. 40, no. 11, November 1986, pages 465-470, München, DE; KORSTEN: "Fotosensible Lötmasken in der Leiterplattenfertigung"
 [A]  - CIRCUIT WORLD, vol. 4, no. 4, April 1978, pages 24-27, GB; AXON et al.: "Achieving optimum performance with UV curable solder masks"
 [A]  - SOLID STATE TECHNOLOGY, vol. 29, no. 6, June 1986, pages 153-157, Port Washington, NY, US; WOPSCHALL: "Dry film photoresists"
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.