Extract from the Register of European Patents

EP About this file: EP0412502

EP0412502 - Method of making MES type field effect transistor using III-V compound semiconductor [Right-click to bookmark this link]
StatusThe application is deemed to be withdrawn
Status updated on  29.11.1995
Database last updated on 11.04.2026
Most recent event   Tooltip29.11.1995Application deemed to be withdrawnpublished on 17.01.1996 [1996/03]
Applicant(s)For all designated states
Kabushiki Kaisha Toshiba
72, Horikawa-cho
Saiwai-ku
Kawasaki-shi
Kanagawa-ken 210-8572 / JP
[N/P]
Former [1991/07]For all designated states
KABUSHIKI KAISHA TOSHIBA
72, Horikawa-cho, Saiwai-ku
Kawasaki-shi, Kanagawa-ken 210, Tokyo / JP
Inventor(s)01 / Imamura, Souichi, c/o Intellectual Property Div.
Kabushiki Kaisha Toshiba, 1-1 Shibaura 1-chome
Minato-ku, Tokyo 105 / JP
02 / Suga, Toru, c/o Intellectual Property Div.
Kabushiki Kaisha Toshiba, 1-1 Shibaura 1-chome
Minato-ku, Tokyo 105 / JP
[1991/07]
Representative(s)Lehn, Werner, et al
Hoffmann Eitle, Patent- und Rechtsanwälte, Postfach 81 04 20
81904 München / DE
[N/P]
Former [1991/07]Lehn, Werner, Dipl.-Ing., et al
Hoffmann, Eitle & Partner, Patentanwälte, Postfach 81 04 20
D-81904 München / DE
Application number, filing date90115162.107.08.1990
[1991/07]
Priority number, dateJP1989020850711.08.1989         Original published format: JP 20850789
[1991/07]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP0412502
Date:13.02.1991
Language:EN
[1991/07]
Search report(s)(Supplementary) European search report - dispatched on:EP08.11.1990
ClassificationIPC:H01L21/265, H01L21/338
[1991/07]
CPC:
H10P30/206 (EP,US); H10D30/0614 (EP); H10P30/212 (EP,US)
Designated contracting statesDE,   FR,   GB [1991/07]
TitleGerman:Verfahren zur Herstellung eines MES-Typ Feld-Effekt-Transistors in einem III-V zusammengesetzten Halbleiter[1991/07]
English:Method of making MES type field effect transistor using III-V compound semiconductor[1991/07]
French:Méthode pour faire un transistor à effet de champ du type MES dans un semi-conducteur composé III-V[1991/07]
File destroyed:03.03.2001
Examination procedure07.08.1990Examination requested  [1991/07]
20.09.1993Despatch of a communication from the examining division (Time limit: M06)
30.03.1994Reply to a communication from the examining division
06.03.1995Despatch of a communication from the examining division (Time limit: M04)
18.07.1995Application deemed to be withdrawn, date of legal effect  [1996/03]
22.08.1995Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time  [1996/03]
Fees paidRenewal fee
10.08.1992Renewal fee patent year 03
11.08.1993Renewal fee patent year 04
09.08.1994Renewal fee patent year 05
Penalty fee
Additional fee for renewal fee
31.08.199506   M06   Not yet paid
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Documents cited:Search[A]   GaAs IC SYMPOSIUM, TECHNICAL DIGEST 1986, Grenelefe, Florida, 28th - 30th October 1986, pages 55-58, IEEE, New York, US; I. OHTA et al.: "An ideal-profile implantation process for GaAs analog MMICs" [A]
 [A]   G.E.C. JOURNAL OF RESEARCH, vol. 1, no. 3, 1983, pages 174-177, Rugby, GB; D.C. BARTLE et al.: "Selective area ion implantation for gallium arsenide microwave devices and circuits" [A]
 [A]   IEEE ELECTRON DEVICE LETTERS, vol. EDL-2, no. 12, December 1981, pages 309-311, IEEE, New York, US; W.M. DUNCAN et al.: "A single step selective implantation technology for multiply doped layers using proximity annealing" [A]
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