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EP0416546
European procedure
Extract from the Register of European Patents
EP About this file: EP0416546
| EP0416546 - Programmable logic device and storage circuit used therewith [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 08.10.1999 Database last updated on 28.03.2026 | Most recent event Tooltip | 08.10.1999 | No opposition filed within time limit | published on 24.11.1999 [1999/47] | Applicant(s) | For all designated states Kabushiki Kaisha Toshiba 72, Horikawa-cho Saiwai-ku Kawasaki-shi Kanagawa-ken 210-8572 / JP | [N/P] |
| Former [1998/49] | For all designated states KABUSHIKI KAISHA TOSHIBA 72, Horikawa-cho, Saiwai-ku Kawasaki-shi, Kanagawa-ken 210 / JP | ||
| Former [1995/01] | For all designated states KABUSHIKI KAISHA TOSHIBA 72, Horikawa-cho, Saiwai-ku Kawasaki-shi, Kanagawa-ken 210, Tokyo / JP | ||
| Former [1991/11] | For all designated states Kabushiki Kaisha Toshiba 72, Horikawa-cho Saiwai-ku Kawasaki-shi / JP | Inventor(s) | 01 /
Saeki, Yukihiro, Intellectual Prop. Div., K.K. Toshiba, 1-1 Shibaura 1-chome, Minato-ku Tokyo / JP | 02 /
Shigematsu, Tomohisa, Intellectual Prop. Div., K.K Toshiba, 1-1 Shibaura 1-chome, Minato-ku Tokyo / JP | [1991/11] | Representative(s) | Lehn, Werner, et al Hoffmann Eitle, Patent- und Rechtsanwälte, Postfach 81 04 20 81904 München / DE | [N/P] |
| Former [1991/11] | Lehn, Werner, Dipl.-Ing., et al Hoffmann, Eitle & Partner, Patentanwälte, Postfach 81 04 20 D-81904 München / DE | Application number, filing date | 90116994.6 | 04.09.1990 | [1991/11] | Priority number, date | JP19890228833 | 04.09.1989 Original published format: JP 22883389 | [1991/11] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0416546 | Date: | 13.03.1991 | Language: | EN | [1991/11] | Type: | A3 Search report | No.: | EP0416546 | Date: | 14.08.1991 | Language: | EN | [1991/33] | Type: | B1 Patent specification | No.: | EP0416546 | Date: | 02.12.1998 | Language: | EN | [1998/49] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 26.06.1991 | Classification | IPC: | H03K19/177 | [1991/11] | CPC: |
H03K19/1776 (EP,US);
H03K19/177 (KR);
H03K17/04106 (EP,US);
H03K17/693 (EP,US);
H03K19/17704 (EP,US);
H03K19/17736 (EP,US);
| Designated contracting states | DE, FR, GB [1991/11] | Title | German: | Programmierbare logische Vorrichtung und zugehörige Speicherschaltung | [1991/11] | English: | Programmable logic device and storage circuit used therewith | [1991/11] | French: | Circuit logique programmable et circuit de mémoire associé | [1991/11] | Examination procedure | 04.09.1990 | Examination requested [1991/11] | 09.06.1994 | Despatch of a communication from the examining division (Time limit: M04) | 10.10.1994 | Reply to a communication from the examining division | 26.06.1995 | Despatch of a communication from the examining division (Time limit: M06) | 29.12.1995 | Reply to a communication from the examining division | 22.07.1996 | Despatch of a communication from the examining division (Time limit: M06) | 23.01.1997 | Reply to a communication from the examining division | 20.03.1998 | Despatch of communication of intention to grant (Approval: Yes) | 08.06.1998 | Communication of intention to grant the patent | 28.08.1998 | Fee for grant paid | 28.08.1998 | Fee for publishing/printing paid | Opposition(s) | 03.09.1999 | No opposition filed within time limit [1999/47] | Fees paid | Renewal fee | 15.09.1992 | Renewal fee patent year 03 | 16.09.1993 | Renewal fee patent year 04 | 08.09.1994 | Renewal fee patent year 05 | 08.09.1995 | Renewal fee patent year 06 | 12.09.1996 | Renewal fee patent year 07 | 10.09.1997 | Renewal fee patent year 08 | 09.09.1998 | Renewal fee patent year 09 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [X] IRE WESCON CONVENTION RECORD. vol. 30, November 1986, NORTH HOLLYWOOD US pages 4/61 - 4/69; D. P. Lautzenheiser: "A Programmable Logic Device Based on Static Memory" [X] |