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Extract from the Register of European Patents

EP About this file: EP0420185

EP0420185 - Semiconductor memory apparatus [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  20.09.1996
Database last updated on 03.10.2024
Most recent event   Tooltip20.09.1996No opposition filed within time limitpublished on 06.11.1996 [1996/45]
Applicant(s)For all designated states
Kabushiki Kaisha Toshiba
72, Horikawa-cho, Saiwai-ku Kawasaki-shi
Kanagawa-ken 210-8572 / JP
For all designated states
TOSHIBA MICRO-ELECTRONICS CORPORATION
25-1, Ekimaehoncho Kawasaki-ku
Kawasaki-shi / JP
[N/P]
Former [1991/14]For all designated states
KABUSHIKI KAISHA TOSHIBA
72, Horikawa-cho, Saiwai-ku
Kawasaki-shi, Kanagawa-ken 210, Tokyo / JP
For all designated states
TOSHIBA MICRO-ELECTRONICS CORPORATION
25-1, Ekimaehoncho
Kawasaki-ku, Kawasaki-shi / JP
Inventor(s)01 / Ogihara, Masaki, c/o Intellectual Property Div.
Kabushiki Kaisha Toshiba, 1-1 Shibaura 1-chome
Minato-ku, Tokyo 105 / JP
02 / Fujii, Syuso, c/o Intellectual Property Div.
Kabushiki Kaisha Toshiba, 1-1 Shibaura 1-chome
Minato-ku, Tokyo 105 / JP
[1991/14]
Representative(s)Lehn, Werner, et al
Hoffmann Eitle, Patent- und Rechtsanwälte, Postfach 81 04 20
81904 München / DE
[N/P]
Former [1991/14]Lehn, Werner, Dipl.-Ing., et al
Hoffmann, Eitle & Partner, Patentanwälte, Postfach 81 04 20
D-81904 München / DE
Application number, filing date90118467.126.09.1990
[1991/14]
Priority number, dateJP1989024908727.09.1989         Original published format: JP 24908789
[1991/14]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0420185
Date:03.04.1991
Language:EN
[1991/14]
Type: A3 Search report 
No.:EP0420185
Date:04.11.1992
Language:EN
[1992/45]
Type: B1 Patent specification 
No.:EP0420185
Date:15.11.1995
Language:EN
[1995/46]
Search report(s)(Supplementary) European search report - dispatched on:EP11.09.1992
ClassificationIPC:G11C8/00
[1992/45]
CPC:
G11C8/14 (EP,US); G11C11/401 (KR)
Former IPC [1991/14]G11C5/06, G11C8/00, G11C7/06
Designated contracting statesDE,   FR,   GB [1991/14]
TitleGerman:Halbleiterspeicheranordnung[1991/14]
English:Semiconductor memory apparatus[1991/14]
French:Dispositif de mémoire à semi-conducteurs[1991/14]
Examination procedure26.09.1990Examination requested  [1991/14]
03.05.1994Despatch of a communication from the examining division (Time limit: M04)
05.09.1994Reply to a communication from the examining division
15.11.1994Despatch of communication of intention to grant (Approval: Yes)
24.02.1995Communication of intention to grant the patent
15.05.1995Fee for grant paid
15.05.1995Fee for publishing/printing paid
Opposition(s)17.08.1996No opposition filed within time limit [1996/45]
Fees paidRenewal fee
15.09.1992Renewal fee patent year 03
16.09.1993Renewal fee patent year 04
08.09.1994Renewal fee patent year 05
08.09.1995Renewal fee patent year 06
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Documents cited:Search[AD]JP61274357  ;
 [A]EP0055572  (FUJITSU LTD [JP]);
 [A]US4733374  (FURUYAMA TOHRU [JP], et al);
 [AP]JPH0264990  (MITSUBISHI ELECTRIC CORP)
 [AD]  - PATENT ABSTRACTS OF JAPAN vol. 11, no. 130 (E-502)23 April 1987 & JP-A-61 274 357 ( TOSHIBA ) 4 December 1986, & JP61274357 A 19861204
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.