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Extract from the Register of European Patents

EP About this file: EP0431416

EP0431416 - Apparatus and method for accessing a cyclic redundancy error check code generated in parallel [Right-click to bookmark this link]
StatusThe application is deemed to be withdrawn
Status updated on  14.06.1996
Database last updated on 09.09.2024
Most recent event   Tooltip14.06.1996Application deemed to be withdrawnpublished on 31.07.1996 [1996/31]
Applicant(s)For all designated states
NATIONAL SEMICONDUCTOR CORPORATION
2900 Semiconductor Drive P.O. Box 58090 Santa Clara
California 95051-8090 / US
[N/P]
Former [1992/40]For all designated states
NATIONAL SEMICONDUCTOR CORPORATION
2900 Semiconductor Drive P.O. Box 58090
Santa Clara California 95051-8090 / US
Former [1991/24]For all designated states
NATIONAL SEMICONDUCTOR CORPORATION
1090 Kifer Road, M/S 16-135
Sunnyvale, CA 95086-3737 / US
Inventor(s)01 / Perloff, Ronald S.
14065 Willow Ranch Road
Poway, CA 92064 / CA
[1991/24]
Representative(s)Sparing Röhl Henseler
Postfach 14 04 43
40074 Düsseldorf / DE
[N/P]
Former [1991/24]Sparing Röhl Henseler Patentanwälte
Postfach 14 04 43
D-40074 Düsseldorf / DE
Application number, filing date90122381.823.11.1990
[1991/24]
Priority number, dateUS1989044596404.12.1989         Original published format: US 445964
[1991/24]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0431416
Date:12.06.1991
Language:EN
[1991/24]
Type: A3 Search report 
No.:EP0431416
Date:29.04.1992
Language:EN
[1992/18]
Search report(s)(Supplementary) European search report - dispatched on:EP12.03.1992
ClassificationIPC:H03M13/00
[1991/24]
CPC:
H03M13/091 (EP)
Designated contracting statesDE,   FR,   GB,   IT [1991/24]
TitleGerman:Gerät und Verfahren zur Realisierung eines zyklischen redundanten Parallel-Fehlerprüfungskodes[1991/24]
English:Apparatus and method for accessing a cyclic redundancy error check code generated in parallel[1991/24]
French:Appareil et méthode pour la réalisation d'un code de vérification d'erreur cyclique en parallèle[1991/24]
File destroyed:20.04.2002
Examination procedure26.06.1992Examination requested  [1992/35]
01.02.1995Despatch of a communication from the examining division (Time limit: M04)
08.06.1995Reply to a communication from the examining division
08.12.1995Despatch of a communication from the examining division (Time limit: M02)
20.02.1996Application deemed to be withdrawn, date of legal effect  [1996/31]
21.03.1996Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time  [1996/31]
Fees paidRenewal fee
23.09.1992Renewal fee patent year 03
01.10.1993Renewal fee patent year 04
07.11.1994Renewal fee patent year 05
Penalty fee
Additional fee for renewal fee
30.11.199506   M06   Not yet paid
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Documents cited:Search[A]DE3841370  ;
 [A]EP0226353  ;
 [AD]US4593393  ;
 [AD]US3703705
 [X]  - IBM TECHNICAL DISCLOSURE BULLETIN. vol. 27, no. 6, November 1984, NEW YORK US pages 3572 - 3576; M.C. NIELSON: 'Method for high speed CRC computation'
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.