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EP0384501
European procedure
Extract from the Register of European Patents
EP About this file: EP0384501
| EP0384501 - Variable resistor in MOS-technology [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 03.02.1994 Database last updated on 13.09.2024 | Most recent event Tooltip | 03.02.1994 | No opposition filed within time limit | published on 23.03.1994 [1994/12] | Applicant(s) | For all designated states Koninklijke Philips Electronics N.V. Groenewoudseweg 1 5621 BA Eindhoven / NL | [N/P] |
| Former [1990/35] | For all designated states Philips Electronics N.V. Groenewoudseweg 1 NL-5621 BA Eindhoven / NL | Inventor(s) | 01 /
Boudewijns, Arnoldus Johannes Juliana c/o INT. OCTROOIBUREAU B.V., Prof. Holstlaan 6 NL-5656 AA Eindhoven / NL | [1990/35] | Representative(s) | Peters, Rudolf Johannes, et al Philips Intellectual Property & Standards High Tech Campus 5 5656 AE Eindhoven / NL | [N/P] |
| Former [1990/35] | Peters, Rudolf Johannes, et al INTERNATIONAAL OCTROOIBUREAU B.V., Prof. Holstlaan 6 NL-5656 AA Eindhoven / NL | Application number, filing date | 90200142.9 | 19.01.1990 | [1990/35] | Priority number, date | NL19890000175 | 25.01.1989 Original published format: NL 8900175 | [1990/35] | Filing language | NL | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP0384501 | Date: | 29.08.1990 | Language: | EN | [1990/35] | Type: | B1 Patent specification | No.: | EP0384501 | Date: | 31.03.1993 | Language: | EN | [1993/13] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 31.05.1990 | Classification | IPC: | H03H11/46 | [1990/35] | CPC: |
H03H11/46 (EP,US);
H03H11/48 (KR)
| Designated contracting states | DE, FR, GB, IT, NL [1990/35] | Title | German: | Regelbarer Widerstand in MOS-Technik | [1990/35] | English: | Variable resistor in MOS-technology | [1990/35] | French: | Résistance réglable dans la technique MOS | [1990/35] | Examination procedure | 25.02.1991 | Examination requested [1991/17] | 16.04.1992 | Despatch of communication of intention to grant (Approval: Yes) | 20.08.1992 | Communication of intention to grant the patent | 30.09.1992 | Fee for grant paid | 30.09.1992 | Fee for publishing/printing paid | Opposition(s) | 04.01.1994 | No opposition filed within time limit [1994/12] | Fees paid | Renewal fee | 28.01.1992 | Renewal fee patent year 03 | 27.01.1993 | Renewal fee patent year 04 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | NL | 31.03.1993 | [1993/51] | Documents cited: | Search | [AD] - P.E. ALLEN et al.: "CMOS analog circuit design", 1987, pages 211-218, Holt, Rinehart and Winston, Inc., New York, US | [A] - ELECTRONICS LETTERS, vol. 22, no. 12, 5th June 1986, pages 667-668, Stevenage, GB; K. NAGARAJ: "New CMOS floating voltage-controlled resistor" |