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EP0454091
European procedure
Extract from the Register of European Patents
EP About this file: EP0454091
| EP0454091 - Input/output protection circuit and semiconductor device having the same [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 19.08.1995 Database last updated on 24.08.2024 | Most recent event Tooltip | 19.08.1995 | No opposition filed within time limit | published on 11.10.1995 [1995/41] | Applicant(s) | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi Kanagawa 211 / JP | [N/P] |
| Former [1991/44] | For all designated states FUJITSU LIMITED 1015, Kamikodanaka, Nakahara-ku Kawasaki-shi, Kanagawa 211 / JP | Inventor(s) | 01 /
Mizutani, Toru 221-B-205, Kamikodanaka, Nakahara-ku Kawasaki-shi, Kanagawa, 211 / JP | 02 /
Kobayashi, Osamu 1-29-36-A-201, Hatsuyama, Miyamae-ku Kawasaki-shi, Kanagawa, 216 / JP | 03 /
Gotoh, Kunihiko 5-1-6-101, Toyogaoka Tama-shi, Tokyo, 206 / JP | [1995/05] |
| Former [1991/44] | 01 /
Mizutani, Toru 221-B-205, Kamikodanaka, Nakahara-ku Kawasaki-shi, Kanagawa, 211 / JP | ||
| 02 /
Kobayashi, Osamu 1-29-36-A-201, Hatsuyama, Miyamae-ku Kawasaki-shi, Kanagawa, 216 / JP | |||
| 03 /
Gotoh, Kunihiko 5-1-6-101, Toyagaoka Tama-shi, Tokyo, 206 / JP | Representative(s) | Schmidt-Evers, Jürgen, et al Mitscherlich PartmbB Patent- und Rechtsanwälte Postfach 33 06 09 80066 München / DE | [N/P] |
| Former [1993/19] | Schmidt-Evers, Jürgen, Dipl.-Ing., et al Patentanwälte Mitscherlich & Partner Postfach 33 06 09 D-80066 München / DE | ||
| Former [1991/44] | Schmidt-Evers, Jürgen, Dipl.-Ing. Patentanwälte Mitscherlich & Partner, Sonnenstrasse 33, Postfach 33 06 09 D-80066 München / DE | Application number, filing date | 91106606.6 | 24.04.1991 | [1991/44] | Priority number, date | JP19900111414 | 26.04.1990 Original published format: JP 11141490 | [1991/44] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0454091 | Date: | 30.10.1991 | Language: | EN | [1991/44] | Type: | A3 Search report | No.: | EP0454091 | Date: | 27.11.1991 | Language: | EN | [1991/48] | Type: | B1 Patent specification | No.: | EP0454091 | Date: | 19.10.1994 | Language: | EN | [1994/42] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 08.10.1991 | Classification | IPC: | H03F1/52, H01L27/02, H03G11/00 | [1991/48] | CPC: |
H03F1/523 (EP,US);
H01L27/02 (KR);
H01L27/04 (KR)
|
| Former IPC [1991/44] | H03G11/00, H01L27/02 | Designated contracting states | DE, FR, GB [1991/44] | Title | German: | Ein-/Ausgangsschutzschaltung und Halbleiterbauelement mit dieser Schaltung | [1991/44] | English: | Input/output protection circuit and semiconductor device having the same | [1991/44] | French: | Circuit de protection d'entrée/de sortie et dispositif semi-conducteur le comportant | [1991/44] | Examination procedure | 16.12.1991 | Examination requested [1992/09] | 16.03.1993 | Despatch of a communication from the examining division (Time limit: M04) | 16.07.1993 | Reply to a communication from the examining division | 15.12.1993 | Despatch of communication of intention to grant (Approval: Yes) | 22.04.1994 | Communication of intention to grant the patent | 26.05.1994 | Fee for grant paid | 26.05.1994 | Fee for publishing/printing paid | Opposition(s) | 20.07.1995 | No opposition filed within time limit [1995/41] | Fees paid | Renewal fee | 29.04.1993 | Renewal fee patent year 03 | 29.04.1994 | Renewal fee patent year 04 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]JP6325976 | [A] - JOURNAL OF ELECTROSTATICS. vol. 24, no. 2, February 1990, AMSTERDAM NL pages 111 - 130; L. R. AVERY: 'A Review of Electrostatic Discharge Mechanisms and On-Chip Protection Techniques to Ensure Device Reliability ' | [A] - PATENT ABSTRACTS OF JAPAN vol. 12, no. 232 (E-628)(3079) June 30, 1988 & JP-A-63 25 976 (TOSHIBA ) February 3, 1988, & JP6325976 A 00000000 | [A] - TOUTE L'ELECTRONIQUE. vol. 37, no. 351, December 1970, PARIS FR pages 569 - 570; 'Deux amplificateurs de 20 W à symétrie quasi-complementaire Radiotecnica TV ' | Examination | JP1012606 | - PATENTS ABSTRACTS OF JAPAN, VOL. 13, NO.186, 2 MAY 1989 & JP-A-1012606(OKI ELECTRIC IND. CO. LTD.), & JP1012606 A 19890502 |