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EP0479235
European procedure
Extract from the Register of European Patents
EP About this file: EP0479235
| EP0479235 - Vector processing device comprising a reduced amount of hardware [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 13.05.1999 Database last updated on 31.08.2024 | Most recent event Tooltip | 13.05.1999 | No opposition filed within time limit | published on 30.06.1999 [1999/26] | Applicant(s) | For all designated states NEC Corporation 7-1, Shiba 5-chome Minato-ku Tokyo 108-8001 / JP | [N/P] |
| Former [1992/15] | For all designated states NEC CORPORATION 7-1, Shiba 5-chome Minato-ku Tokyo / JP | Inventor(s) | 01 /
Kinoshita, Koji, c/o NEC Corporation 7-1, Shiba 5-chome Minato-ku, Tokyo / JP | [1992/15] | Representative(s) | Vossius & Partner Patentanwälte Rechtsanwälte mbB Siebertstrasse 3 81675 München / DE | [N/P] |
| Former [1992/15] | VOSSIUS & PARTNER Postfach 86 07 67 D-81634 München / DE | Application number, filing date | 91116765.8 | 01.10.1991 | [1992/15] | Priority number, date | JP19900264139 | 02.10.1990 Original published format: JP 26413990 | [1992/15] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0479235 | Date: | 08.04.1992 | Language: | EN | [1992/15] | Type: | A3 Search report | No.: | EP0479235 | Date: | 09.09.1992 | Language: | EN | [1992/37] | Type: | B1 Patent specification | No.: | EP0479235 | Date: | 08.07.1998 | Language: | EN | [1998/28] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 17.07.1992 | Classification | IPC: | G06F15/78 | [1992/15] | CPC: |
G06F15/8061 (EP,US);
G06F15/8076 (EP,US);
G06F9/345 (EP,US);
G06F9/3455 (EP,US)
| Designated contracting states | DE, FR, GB, IT, NL [1992/15] | Title | German: | Vektorprozessor mit beschränkter Hardwaremenge | [1992/15] | English: | Vector processing device comprising a reduced amount of hardware | [1992/15] | French: | Processeur vectoriel avec quantité de matériel limité | [1992/15] | Examination procedure | 30.10.1991 | Examination requested [1992/15] | 01.07.1996 | Despatch of a communication from the examining division (Time limit: M06) | 13.01.1997 | Reply to a communication from the examining division | 19.06.1997 | Despatch of communication of intention to grant (Approval: No) | 08.01.1998 | Despatch of communication of intention to grant (Approval: later approval) | 13.01.1998 | Communication of intention to grant the patent | 20.03.1998 | Fee for grant paid | 20.03.1998 | Fee for publishing/printing paid | Opposition(s) | 09.04.1999 | No opposition filed within time limit [1999/26] | Fees paid | Renewal fee | 28.10.1993 | Renewal fee patent year 03 | 28.10.1994 | Renewal fee patent year 04 | 30.10.1995 | Renewal fee patent year 05 | 29.10.1996 | Renewal fee patent year 06 | 30.10.1997 | Renewal fee patent year 07 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [Y]EP0232827 (HITACHI LTD [JP], et al); | [Y]EP0282070 (FUJITSU LTD [JP]); | [A]EP0286081 (HITACHI LTD [JP]); | [A]EP0044562 (HITACHI LTD [JP]) | [A] - MICROPROCESSING AND MICROPROGRAMMING. vol. 30, no. 1-5, August 1990, AMSTERDAM NL pages 657 - 664; DEKEYSER: 'Vector addressing processor for direct and indirect accesses' |