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EP0480365
European procedure
Extract from the Register of European Patents
EP About this file: EP0480365
| EP0480365 - Production of solder masked electric circuit boards [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 15.11.1996 Database last updated on 12.11.2024 | Most recent event Tooltip | 15.11.1996 | No opposition filed within time limit | published on 02.01.1997 [1997/01] | Applicant(s) | For all designated states Nippon Paint Co., Ltd. 1-2, Oyodo-kita 2-chome, Kita-ku Osaka-shi Osaka-fu / JP | [N/P] |
| Former [1992/16] | For all designated states Nippon Paint Co., Ltd. 1-2, Oyodo-kita 2-chome, Kita-ku Osaka-shi Osaka-fu / JP | Inventor(s) | 01 /
Matsumura, Akira 1-72-15, Kuzuhaoka Hirakata-shi, Osaka-fu / JP | 02 /
Ishikawa, Katsukiyo 2-40, Sayamakitadai, Kumiyama-cho Kuze-gun, Kyoto-fu / JP | [1992/16] | Representative(s) | Hansen, Bernd, et al Hoffmann Eitle Patent- und Rechtsanwälte Postfach 81 04 20 81904 München / DE | [N/P] |
| Former [1992/16] | Hansen, Bernd, Dr. Dipl.-Chem., et al Hoffmann, Eitle & Partner Patent- und Rechtsanwälte, Postfach 81 04 20 D-81904 München / DE | Application number, filing date | 91117125.4 | 08.10.1991 | [1992/16] | Priority number, date | JP19900270959 | 08.10.1990 Original published format: JP 27095990 | [1992/16] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0480365 | Date: | 15.04.1992 | Language: | EN | [1992/16] | Type: | A3 Search report | No.: | EP0480365 | Date: | 26.08.1992 | Language: | EN | [1992/35] | Type: | B1 Patent specification | No.: | EP0480365 | Date: | 10.01.1996 | Language: | EN | [1996/02] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 06.07.1992 | Classification | IPC: | H05K3/34, G03F7/004, G03F7/16 | [1992/16] | CPC: |
H05K3/281 (EP,US);
H05K2203/0152 (EP,US);
H05K2203/066 (EP,US);
H05K2203/135 (EP,US);
H05K3/0079 (EP,US);
Y10S430/136 (EP,US)
| Designated contracting states | DE, FR, GB, NL [1992/16] | Title | German: | Herstellung von lötmaskierten Leiterplatten | [1992/16] | English: | Production of solder masked electric circuit boards | [1992/16] | French: | Fabrication de plaquettes de circuit imprimé masquées contre la soudure | [1992/16] | Examination procedure | 09.12.1992 | Examination requested [1993/05] | 05.04.1994 | Despatch of a communication from the examining division (Time limit: M04) | 11.08.1994 | Reply to a communication from the examining division | 23.02.1995 | Despatch of communication of intention to grant (Approval: Yes) | 20.06.1995 | Communication of intention to grant the patent | 31.08.1995 | Fee for grant paid | 31.08.1995 | Fee for publishing/printing paid | Opposition(s) | 11.10.1996 | No opposition filed within time limit [1997/01] | Fees paid | Renewal fee | 29.10.1993 | Renewal fee patent year 03 | 27.10.1994 | Renewal fee patent year 04 | 30.10.1995 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [Y]DE3628340 (MITSUBISHI ELECTRIC CORP [JP], et al); | [Y]EP0330339 (THIOKOL MORTON INC [US]) | Examination | EP0204415 |