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EP0461922
European procedure
Extract from the Register of European Patents
EP About this file: EP0461922
| EP0461922 - Integration circuit [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 16.06.2000 Database last updated on 03.10.2024 | Most recent event Tooltip | 16.06.2000 | No opposition filed within time limit | published on 02.08.2000 [2000/31] | Applicant(s) | For all designated states Kabushiki Kaisha Toshiba 72, Horikawa-cho, Saiwai-ku Kawasaki-shi Kanagawa-ken 210-8572 / JP | [N/P] |
| Former [1999/33] | For all designated states KABUSHIKI KAISHA TOSHIBA 72, Horikawa-cho, Saiwai-ku Kawasaki-shi, Kanagawa-ken 210-8572 / JP | ||
| Former [1995/01] | For all designated states KABUSHIKI KAISHA TOSHIBA 72, Horikawa-cho, Saiwai-ku Kawasaki-shi, Kanagawa-ken 210, Tokyo / JP | ||
| Former [1991/51] | For all designated states Kabushiki Kaisha Toshiba 72, Horikawa-cho Saiwai-ku Kawasaki-shi / JP | Inventor(s) | 01 /
Koyama, Mikio, c/o Intellectual Property Division Kabushiki Kaisha Toshiba, 1-1 Shibaura 1-chome Minato-ku, Tokyo 105 / JP | 02 /
Tanimoto, Hiroshi, c/o Intellectual Property Div. Kabushiki Kaisha Toshiba, 1-1 Shibaura 1-chome Minato-ku, Tokyo 105 / JP | [1991/51] | Representative(s) | Freed, Arthur Woolf, et al Marks & Clerk Incorporating Edward Evans Barker 90 Long Acre London WC2E 9RA / GB | [N/P] |
| Former [1991/51] | Freed, Arthur Woolf, et al MARKS & CLERK, 57-60 Lincoln's Inn Fields London WC2A 3LS / GB | Application number, filing date | 91305416.9 | 14.06.1991 | [1991/51] | Priority number, date | JP19900155514 | 15.06.1990 Original published format: JP 15551490 | JP19900061664 | 26.03.1991 Original published format: JP 6166490 | [1991/51] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0461922 | Date: | 18.12.1991 | Language: | EN | [1991/51] | Type: | A3 Search report | No.: | EP0461922 | Date: | 20.05.1992 | Language: | EN | [1992/21] | Type: | B1 Patent specification | No.: | EP0461922 | Date: | 18.08.1999 | Language: | EN | [1999/33] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 27.03.1992 | Classification | IPC: | G06G7/184, H03H11/04 | [1991/51] | CPC: |
G06G7/184 (EP,US);
H03H11/00 (KR);
H03H11/0433 (EP,US);
H03H11/045 (EP,US)
| Designated contracting states | DE, GB [1999/22] |
| Former [1991/51] | DE, FR, GB | Title | German: | Integrierschaltung | [1991/51] | English: | Integration circuit | [1991/51] | French: | Circuit d'intégration | [1991/51] | Examination procedure | 26.06.1991 | Examination requested [1991/51] | 22.11.1996 | Despatch of a communication from the examining division (Time limit: M06) | 23.05.1997 | Reply to a communication from the examining division | 16.12.1997 | Despatch of a communication from the examining division (Time limit: M04) | 16.04.1998 | Reply to a communication from the examining division | 27.08.1998 | Despatch of communication of intention to grant (Approval: Yes) | 05.01.1999 | Communication of intention to grant the patent | 07.04.1999 | Fee for grant paid | 07.04.1999 | Fee for publishing/printing paid | Opposition(s) | 19.05.2000 | No opposition filed within time limit [2000/31] | Fees paid | Renewal fee | 14.06.1993 | Renewal fee patent year 03 | 11.06.1994 | Renewal fee patent year 04 | 01.05.1995 | Renewal fee patent year 05 | 10.06.1996 | Renewal fee patent year 06 | 10.06.1997 | Renewal fee patent year 07 | 15.06.1998 | Renewal fee patent year 08 | 14.06.1999 | Renewal fee patent year 09 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [Y]US4904952 (TANIMOTO HIROSHI [JP]) | [X] - PROCEEDINGS OF THE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS. vol. 22, no. 1/3, 1989, IEEE, NEW YORK US pages 100 - 105; KRUMMENACHER: 'Design considerations in high-frequency CMOS transductance amplifier capacitor filters' |