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EP0486201
European procedure
Extract from the Register of European Patents
EP About this file: EP0486201
| EP0486201 - Method for production of a dielectric-separation substrate [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 24.12.1997 Database last updated on 07.10.2024 | Most recent event Tooltip | 24.12.1997 | No opposition filed within time limit | published on 11.02.1998 [1998/07] | Applicant(s) | For all designated states SHIN-ETSU HANDOTAI COMPANY LIMITED 4-2, Marunouchi 1-Chome Chiyoda-ku Tokyo / JP | [N/P] |
| Former [1992/21] | For all designated states SHIN-ETSU HANDOTAI COMPANY LIMITED 4-2, Marunouchi 1-Chome Chiyoda-ku Tokyo / JP | Inventor(s) | 01 /
Ohki, Konomu Shinpu-ryo, Nishikami-isobe 1610 Annaka-shi, Gunma-ken / JP | 02 /
Ohta, Yutaka Gohhara 165-1-A-10 Annaka-shi, Gunma-ken / JP | 03 /
Katayama, Masatake Shimotoyooka-machi 179-7 Takasaki-shi Gunma-ken / JP | [1992/21] | Representative(s) | Pacitti, Pierpaolo Alfonso, et al Murgitroyd and Company 165-169 Scotland Street Glasgow G5 8PL / GB | [N/P] |
| Former [1993/09] | Pacitti, Pierpaolo A.M.E., et al Murgitroyd and Company 373 Scotland Street Glasgow G5 8QA / GB | ||
| Former [1992/21] | Pacitti, Pierpaolo A.M.E. Murgitroyd and Company 373 Scotland Street Glasgow G5 8QA / GB | Application number, filing date | 91310218.2 | 05.11.1991 | [1992/21] | Priority number, date | JP19900310201 | 15.11.1990 Original published format: JP 31020190 | [1992/21] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0486201 | Date: | 20.05.1992 | Language: | EN | [1992/21] | Type: | A3 Search report | No.: | EP0486201 | Date: | 10.02.1993 | Language: | EN | [1993/06] | Type: | B1 Patent specification | No.: | EP0486201 | Date: | 26.02.1997 | Language: | EN | [1997/09] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 18.12.1992 | Classification | IPC: | H01L21/76, H01L21/321 | [1992/21] | CPC: |
H01L21/32136 (EP,US);
H01L21/76264 (EP,US);
H01L21/76297 (EP,US);
H01L21/763 (EP,US);
H01L21/76275 (EP,US);
H01L21/76286 (EP,US)
| Designated contracting states | DE, FR, GB [1992/21] | Title | German: | Verfahren zur Herstellung eines Substrates mit dielektrischer Trennung | [1992/21] | English: | Method for production of a dielectric-separation substrate | [1992/21] | French: | Procédé de fabrication d'un substrat à séparation diélectrique | [1992/21] | Examination procedure | 14.04.1993 | Examination requested [1993/23] | 01.06.1994 | Despatch of a communication from the examining division (Time limit: M04) | 29.09.1994 | Reply to a communication from the examining division | 06.09.1995 | Despatch of a communication from the examining division (Time limit: M06) | 06.03.1996 | Reply to a communication from the examining division | 12.06.1996 | Despatch of communication of intention to grant (Approval: Yes) | 30.08.1996 | Communication of intention to grant the patent | 12.11.1996 | Fee for grant paid | 12.11.1996 | Fee for publishing/printing paid | Opposition(s) | 27.11.1997 | No opposition filed within time limit [1998/07] | Fees paid | Renewal fee | 19.11.1993 | Renewal fee patent year 03 | 22.11.1994 | Renewal fee patent year 04 | 23.11.1995 | Renewal fee patent year 05 | 02.12.1996 | Renewal fee patent year 06 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [Y]US4948742 (NISHIMURA TADASHI [JP], et al); | [A]US4851078 (SHORT JOHN P [US], et al); | [A]EP0166207 (IBM [US]) | [Y] - NAKAGAWA A., YAMAGUCHI Y., WATANABE K., "500V LATERAL DOUBLE GATE BIPOLAR-MODE MOSFET(DGIGBT) DIELECTRICALLY ISOLATED BY SILICON WAFER DIRECT-BONDING(DISDB).", EXTENDED ABSTRACTS OF THE INTERNATIONAL CONFERENCE ON SOLID STATE DEVICES AND MATERIALS. TOKYO, AUG. 24 - 26, 1988., NEW YORK, IEEE., US, US, (19880824), vol. CONF. 20, no. 1988., pages 33 - 36., XP000043501 | [X] - CHEMICAL ABSTRACTS, vol. 83, no. 24, 15 December 1975, Columbus, Ohio, US; abstract no. 200986b, V.M. KOLESHKO ET AL. 'RATE OF ETCHING OF HIGHLY DOPED POLYCRYSTALLINE THIN FILMS OF SILICON' page 539 ;column LEFT ; | [X] - CHEM. ING.-TECH. vol. 59, no. 5, 1987, WEINHEIM DE pages 427 - 429 R.B. HEIMANN 'CARBON TRAPPED IN THIN OXIDE FILMS PRODUCED DURING POLISHING OF SEMICONDUCTOR SILICON IN THE SYSTEM HF/HNO3/CARBOXYLIC ACID.' | [A] - SOLID STATE TECHNOLOGY vol. 29, no. 9, September 1986, WASHINGTON US page 70 S.B. FELCH ET AL. 'A WET ETCH FOR POLYSILICON WITH HIGH SELECTIVITY TO PHOTORESIST' | [A] - EXTENDED ABSTRACTS vol. 87-2, 1987, PRINCETON, NEW JERSEY US pages 1476 - 1477 J.A. KIRCHGESSNER ET AL. 'A TRI-LEVEL EPITAXIAL SILICON STRUCTURE FOR BIPOLAR VLSI.' |