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EP0497319
European procedure
Extract from the Register of European Patents
EP About this file: EP0497319
| EP0497319 - Semiconductor integrated circuit device having substrate potential detection circuit [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 28.02.1997 Database last updated on 13.07.2024 | Most recent event Tooltip | 28.02.1997 | No opposition filed within time limit | published on 16.04.1997 [1997/16] | Applicant(s) | For all designated states NEC Corporation 7-1, Shiba 5-chome Minato-ku Tokyo 108-8001 / JP | [N/P] |
| Former [1992/32] | For all designated states NEC CORPORATION 7-1, Shiba 5-chome Minato-ku Tokyo / JP | Inventor(s) | 01 /
Hara, Takahiro, c/o NEC Corporation 7-1, Shiba 5-chome Minato-ku, Tokyo / JP | [1992/32] | Representative(s) | Glawe, Delfs, Moll Partnerschaft mbB von Patent- und Rechtsanwälten Postfach 26 01 62 80058 München / DE | [N/P] |
| Former [1992/32] | Glawe, Delfs, Moll & Partner Patentanwälte Postfach 26 01 62 D-80058 München / DE | Application number, filing date | 92101479.1 | 29.01.1992 | [1992/32] | Priority number, date | JP19910028077 | 29.01.1991 Original published format: JP 2807791 | [1992/32] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP0497319 | Date: | 05.08.1992 | Language: | EN | [1992/32] | Type: | B1 Patent specification | No.: | EP0497319 | Date: | 24.04.1996 | Language: | EN | [1996/17] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 18.05.1992 | Classification | IPC: | H03F1/30, H01L27/02 | [1992/32] | CPC: |
H01L27/02 (EP,US);
G11C11/403 (KR);
G05F1/465 (EP,US);
G11C11/4074 (EP,US);
H03F1/301 (EP,US)
| Designated contracting states | DE, FR, GB, NL [1992/32] | Title | German: | Integrierte Halbleiter-Schaltungseinheit mit Detektionsschaltung für Substrat-Potential | [1996/17] | English: | Semiconductor integrated circuit device having substrate potential detection circuit | [1992/32] | French: | Dispositif de circuit intégré à semi-conducteur à circuit détecteur de potentiel de substrat | [1992/32] |
| Former [1992/32] | Halbleiterintegrierte Schaltungseinheit mit Substratpotentialdetektionsschaltung | Examination procedure | 29.01.1992 | Examination requested [1992/32] | 29.07.1994 | Despatch of a communication from the examining division (Time limit: M06) | 08.02.1995 | Reply to a communication from the examining division | 16.06.1995 | Despatch of communication of intention to grant (Approval: Yes) | 24.07.1995 | Communication of intention to grant the patent | 27.10.1995 | Fee for grant paid | 27.10.1995 | Fee for publishing/printing paid | Opposition(s) | 25.01.1997 | No opposition filed within time limit [1997/16] | Fees paid | Renewal fee | 18.01.1994 | Renewal fee patent year 03 | 19.01.1995 | Renewal fee patent year 04 | 19.01.1996 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [Y]JP63224665 ; | [Y]JP59122225 ; | [A]JP59163569 | [Y] - PATENT ABSTRACTS OF JAPAN vol. 13, no. 018 (E-704)17 January 1989 & JP-A-63 224 665 ( MITSUBISHI ) 19 September 1988, & JP63224665 A 19880919 | [Y] - PATENT ABSTRACTS OF JAPAN vol. 8, no. 243 (E-277)(1680) 8 November 1984 & JP-A-59 122 225 ( NIHON TEKISASU INSUTSURUMENTSU K.K. ) 14 July 1984, & JP59122225 A 19840714 | [A] - ELECTRONICS LETTERS. vol. 26, no. 17, 16 August 1990, ENAGE GB U. GATTI ET AL: | [A] - PATENT ABSTRACTS OF JAPAN vol. 9, no. 016 (P-329)23 January 1985 & JP-A-59 163 569 ( MATSUSHITA DENKI SANGYO K.K. ) 14 September 1984, & JP59163569 A 19840914 | Examination | - ELECTRONICS LETTERS, vol. 26, no. 17, 16 August 1990, Enage, GB, pp 1381-1382; U. GATTI et al.: "Automatic switching of substrate bias or well bias in CMOS-ICs" |