EP0544128 - Circuit arrangement for a driver circuit [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 03.05.1996 Database last updated on 03.10.2024 | Most recent event Tooltip | 03.05.1996 | No opposition filed within time limit | published on 19.06.1996 [1996/25] | Applicant(s) | For all designated states SIEMENS AKTIENGESELLSCHAFT Werner-von-Siemens-Str. 1 DE-80333 München / DE | [N/P] |
Former [1993/22] | For all designated states SIEMENS AKTIENGESELLSCHAFT Wittelsbacherplatz 2 D-80333 München / DE | Inventor(s) | 01 /
Rein, Hans-Martin, Prof. Dr. Ein Bäumchen 6 W-5810 Witten / DE | [1993/22] | Application number, filing date | 92118905.6 | 04.11.1992 | [1993/22] | Priority number, date | DE19914138661 | 25.11.1991 Original published format: DE 4138661 | [1993/22] | Filing language | DE | Procedural language | DE | Publication | Type: | A1 Application with search report | No.: | EP0544128 | Date: | 02.06.1993 | Language: | DE | [1993/22] | Type: | B1 Patent specification | No.: | EP0544128 | Date: | 28.06.1995 | Language: | DE | [1995/26] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 02.04.1993 | Classification | IPC: | H03K5/02, H03F3/45 | [1993/22] | CPC: |
H03F3/45479 (EP,US);
H03K5/02 (EP,US)
| Designated contracting states | BE, DE, FR, GB, IT [1993/22] | Title | German: | Schaltungsanordnung für eine Treiberschaltung | [1993/22] | English: | Circuit arrangement for a driver circuit | [1993/22] | French: | Montage pour un circuit d'attaque | [1993/22] | Examination procedure | 18.06.1993 | Examination requested [1993/33] | 05.12.1994 | Despatch of communication of intention to grant (Approval: Yes) | 15.12.1994 | Communication of intention to grant the patent | 07.03.1995 | Fee for grant paid | 07.03.1995 | Fee for publishing/printing paid | Opposition(s) | 29.03.1996 | No opposition filed within time limit [1996/25] | Fees paid | Renewal fee | 18.11.1994 | Renewal fee patent year 03 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]JP55130208 ; | [A]JP57186810 ; | [A]FR2424666 (PHILIPS NV [NL]); | [A]FR1515200 (COMP GENERALE ELECTRICITE) | [A] - PATENT ABSTRACTS OF JAPAN vol. 4, no. 189 (E-039)25. Dezember 1980 & JP-A-55 130 208 ( SHIBAURA ENG WORKS CO LTD ) 8. Oktober 1980, & JP55130208 A 00000000 | [A] - PATENT ABSTRACTS OF JAPAN vol. 7, no. 033 (E-157)9. Februar 1983 & JP-A-57 186 810 ( MITSUBISHI DENKI K.K. ) 17. November 1982, & JP57186810 A 00000000 | [A] - TELECOMMUNICATIONS AND RADIO ENGINEERING Bd. 29/30, Nr. 9, September 1975, WASHINGTON US Seiten 123 - 124 V. KRAKOVSKIY 'compensation of zero offset voltage in operational amplifiers' | [A] - PROCEEDINGS OF THE NATIONAL ELECTRONICS CONFERENCE Bd. 25, Nr. 8-10, Dezember 1969, OAK BROOK, ILLINOIS US Seiten 121 - 123 G. ERDI 'MINIMIZING OFFSET VOLTAGE DRIFT WITH TEMPERATURE IN MONOLITHIC OPERATIONAL AMPLIFIERS' |