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Extract from the Register of European Patents

EP About this file: EP0508975

EP0508975 - Protection circuit for integrated circuits CMOS/BICMOS and method of producing such a protection circuit [Right-click to bookmark this link]
StatusThe application is deemed to be withdrawn
Status updated on  02.11.1993
Database last updated on 13.07.2024
Most recent event   Tooltip02.11.1993Application deemed to be withdrawnpublished on 22.12.1993 [1993/51]
Applicant(s)For all designated states
AUSTRIA MIKRO SYSTEME INTERNATIONAL GESELLSCHAFT m.b.H. (Austria Micro Systems International Gesellschaft m.b.H.)
Schloss Premstätten, Tobelbachstrasse
A-8141 Unterpremstätten / AT
[N/P]
Former [1992/42]For all designated states
AUSTRIA MIKRO SYSTEME INTERNATIONAL GESELLSCHAFT m.b.H. (Austria Micro Systems International Gesellschaft m.b.H.)
Schloss Premstätten, Tobelbachstrasse
A-8141 Unterpremstätten / AT
Inventor(s)01 / Dietrich, Armgarth, Dr. Dipl.-Ing.
Bischofsweg 1
O-8060 Dresden / DE
[1992/42]
Representative(s)Haffner, Thomas M.
Haffner und Keschmann
Patentanwälte KG
Schottengasse 3a
1014 Wien / AT
[N/P]
Former [1992/42]Haffner, Thomas M., Dr.
Patentanwalt Schottengasse 3a
A-1014 Wien / AT
Application number, filing date92890057.013.03.1992
[1992/42]
Priority number, dateAT1991000056113.03.1991         Original published format: AT 56191
[1992/42]
Filing languageDE
Procedural languageDE
PublicationType: A1 Application with search report 
No.:EP0508975
Date:14.10.1992
Language:DE
[1992/42]
Search report(s)(Supplementary) European search report - dispatched on:EP07.08.1992
ClassificationIPC:H01L27/02
[1992/42]
CPC:
H01L27/0251 (EP); H01L27/0248 (EP)
Designated contracting statesAT,   BE,   CH,   DE,   DK,   ES,   FR,   GB,   IT,   LI,   SE [1992/42]
TitleGerman:Schutzschaltung für integrierte CMOS/BICMOS-Schaltungsanordnungen und Verfahren zur Herstellung einer derartigen Schutzschaltung[1992/42]
English:Protection circuit for integrated circuits CMOS/BICMOS and method of producing such a protection circuit[1992/42]
French:Circuit de protection pour circuits intégrés CMOS/BICMOS et procédé de fabrication d'un tel circuit de protection[1992/42]
File destroyed:28.08.2001
Examination procedure15.04.1993Application deemed to be withdrawn, date of legal effect  [1993/51]
27.07.1993Despatch of communication that the application is deemed to be withdrawn, reason: examination fee not paid in time  [1993/51]
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Documents cited:Search[A]US4930037  ;
 [A]JPS6085553
 [A]  - PATENT ABSTRACTS OF JAPAN vol. 9no. 230 (E-343)17. September 1985 & JP-A-60 085 553 ( HITACHI ) 15. Mai 1985
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.