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EP0591342
European procedure
Extract from the Register of European Patents
EP About this file: EP0591342
| EP0591342 - BASIC CELL ARCHITECTURE FOR MASK PROGRAMMABLE GATE ARRAY [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 23.08.2002 Database last updated on 21.09.2024 | Most recent event Tooltip | 07.12.2007 | Lapse of the patent in a contracting state New state(s): IT | published on 09.01.2008 [2008/02] | Applicant(s) | For all designated states Artisan Components, Inc. 1195 Bordeaux Sunnyvale, CA 94089-1210 / US | [2001/18] |
| Former [1996/02] | For all designated states Synopsys, Inc. 700 East Middlefield Road Mountain View, California 94043-4033 / US | ||
| Former [1994/15] | For all designated states SIARC 477 Potrero Avenue Sunnyvale, California 94086 / US | Inventor(s) | 01 /
EL GAMAL, Abbas 1485 Hamilton Avenue Palo Alto, CA 94301 / US | [1994/15] | Representative(s) | WP Thompson 138 Fetter Lane London EC4A 1BT / GB | [N/P] |
| Former [1994/15] | W.P. THOMPSON & CO. Celcon House 289-293 High Holborn London WC1V 7HU / GB | Application number, filing date | 92913556.4 | 11.06.1992 | [1994/15] | WO1992US05003 | Priority number, date | US19910717140 | 18.06.1991 Original published format: US 717140 | [1994/15] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | WO9222924 | Date: | 23.12.1992 | Language: | EN | [1992/32] | Type: | A1 Application with search report | No.: | EP0591342 | Date: | 13.04.1994 | Language: | EN | The application published by WIPO in one of the EPO official languages on 23.12.1992 takes the place of the publication of the European patent application. | [1994/15] | Type: | B1 Patent specification | No.: | EP0591342 | Date: | 17.10.2001 | Language: | EN | [2001/42] | Search report(s) | International search report - published on: | US | 23.12.1992 | (Supplementary) European search report - dispatched on: | EP | 18.03.1994 | Classification | IPC: | H01L27/02, H01L27/10, H01L27/15 | [1994/15] | CPC: |
H01L27/11896 (EP,US);
H01L27/11807 (EP,US);
H03K19/09448 (EP,US);
H03K19/1735 (EP,US)
| Designated contracting states | DE, FR, GB, IT, NL [1994/15] | Title | German: | BASISZELLEN-ARCHITEKTUR FÜR MASKENPROGRAMMIERBARE GATTERMATRIX | [1994/15] | English: | BASIC CELL ARCHITECTURE FOR MASK PROGRAMMABLE GATE ARRAY | [1994/15] | French: | ARCHITECTURE DE CELLULES DE BASE POUR MATRICE DE PORTES PROGRAMMABLE PAR MASQUAGE | [1994/15] | Entry into regional phase | 21.12.1993 | National basic fee paid | 21.12.1993 | Search fee paid | 21.12.1993 | Designation fee(s) paid | 21.12.1993 | Examination fee paid | Examination procedure | 14.01.1993 | Request for preliminary examination filed International Preliminary Examining Authority: DE | 21.12.1993 | Examination requested [1994/15] | 29.03.1996 | Despatch of a communication from the examining division (Time limit: M04) | 02.08.1996 | Reply to a communication from the examining division | 09.05.1997 | Despatch of a communication from the examining division (Time limit: M04) | 13.09.1997 | Reply to a communication from the examining division | 08.03.1999 | Despatch of a communication from the examining division (Time limit: M04) | 16.07.1999 | Reply to a communication from the examining division | 28.09.2000 | Despatch of communication of intention to grant (Approval: Yes) | 11.04.2001 | Communication of intention to grant the patent | 25.05.2001 | Fee for grant paid | 25.05.2001 | Fee for publishing/printing paid | Opposition(s) | 18.07.2002 | No opposition filed within time limit [2002/41] | Fees paid | Renewal fee | 11.06.1994 | Renewal fee patent year 03 | 26.05.1995 | Renewal fee patent year 04 | 28.05.1996 | Renewal fee patent year 05 | 27.05.1997 | Renewal fee patent year 06 | 26.05.1998 | Renewal fee patent year 07 | 21.05.1999 | Renewal fee patent year 08 | 23.05.2000 | Renewal fee patent year 09 | 23.05.2001 | Renewal fee patent year 10 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | IT | 17.10.2001 | GB | 11.06.2002 | [2008/02] |
| Former [2004/21] | GB | 11.06.2002 | Documents cited: | Search | [ ] - No further relevant documents disclosed | International search | [XY]US5038192 (BONNEAU MARTINE [FR], et al); | [Y]US5060046 (SHINTANI YOSHIO [JP]); | [A]US4816887 (SATO SHINJI [JP]); | [A]JPS63306641 (NEC CORP); | [A]JPH02284468 (NEC CORP) | Examination | US5072285 | JPS5851536 | JPS58122771 | JPH0479143 | JPS6017932 | JPH0479145 | US4611236 | US4727266 | US4965651 | US4829200 | US4945395 | US4804868 | US4791320 | US4682202 | US4649294 | US4069494 | US5068548 | US5055716 | - IBM TDB Vol. 22 No. 7, Dec. 1979, pages 2772-2774 | - IBM TDB Vol. 28 No. 8, January 1986, Pages 3558-3561 | - Sporck et al. "A CMOS Master Slice Chip With Versatile Design Features", 1984, IEEE |