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Extract from the Register of European Patents

EP About this file: EP0569204

EP0569204 - Method of making N-channel and P-channel junction field-effect transistors using a BiCMOS process [Right-click to bookmark this link]
Former [1993/45]	Method of making N-channel and P-channel junction field-effect transistors and CMOS transistors using a CMOS or bipolar/CMOS process
	[1998/39]
Status	No opposition filed within time limit Status updated on 30.07.1999 Database last updated on 25.09.2024
Most recent event Tooltip	28.12.2007	Lapse of the patent in a contracting state New state(s): IT	published on 30.01.2008 [2008/05]
Applicant(s)	For all designated states NATIONAL SEMICONDUCTOR CORPORATION 2900 Semiconductor Drive, P.O. Box 58090 Santa Clara California 95052-8090 / US
	[N/P]
Former [1993/45]	For all designated states NATIONAL SEMICONDUCTOR CORPORATION 2900 Semiconductor Drive, P.O. Box 58090 Santa Clara, California 95052-8090 / US
Inventor(s)	01 / Merrill, Richard B. 258 Alta Vista Daly City, California 94014 / US
	02 / Farrenkopf, Doug R. 2815 Steinhart Ct. Santa Clara, California 95051 / US
	[1993/45]
Representative(s)	Bowles, Sharon Margaret, et al BOWLES HORTON Felden House Dower Mews High Street Berkhamsted Hertfordshire HP4 2BL / GB
	[N/P]
Former [1993/45]	Bowles, Sharon Margaret, et al BOWLES HORTON Felden House Dower Mews High Street Berkhamsted Hertfordshire HP4 2BL / GB
Application number, filing date	93303427.4	30.04.1993
	[1993/45]
Priority number, date	US19920880677	08.05.1992 Original published format: US 880677
	[1993/45]
Filing language	EN
Procedural language	EN
Publication	Type:	A2 Application without search report
	No.:	EP0569204
	Date:	10.11.1993
	Language:	EN
	[1993/45]
	Type:	A3 Search report
	No.:	EP0569204
	Date:	02.11.1994
	Language:	EN
	[1994/44]
	Type:	B1 Patent specification
	No.:	EP0569204
	Date:	23.09.1998
	Language:	EN
	[1998/39]
Search report(s)	(Supplementary) European search report - dispatched on:	EP	19.09.1994
Classification	IPC:	H01L21/82, H01L27/06	[1998/39]
	CPC:	H01L21/8249 (EP,US); H01L29/70 (KR); H01L27/0623 (EP,US)
	Former IPC [1994/45]	H01L21/82, H01L27/085, H01L27/06
	Former IPC [1993/45]	H01L21/82, H01L27/085
Designated contracting states	DE, FR, GB, IT [1993/45]
Title	German:	Verfahren zur Herstellung von N-Kanal- und P-Kanal-Sperrschicht-Feldeffekttransistoren unter Verwendung eines BiCMOS-Verfahrens	[1998/39]
	English:	Method of making N-channel and P-channel junction field-effect transistors using a BiCMOS process	[1998/39]
	French:	Procédé de fabrication des transistors à effet de champ à jonction à canal N et à canal P avec un procédé BiCMOS	[1998/39]
	Former [1993/45]	Verfahren zur Herstellung von N-Kanal- und P-Kanal-Sperrschicht-Feldeffekttransistoren unter Verwendung eines CMOS- oder Bipolar/CMOS-Verfahrens
	Former [1993/45]	Method of making N-channel and P-channel junction field-effect transistors and CMOS transistors using a CMOS or bipolar/CMOS process
	Former [1993/45]	Procédé de fabrication des transistors à effet de champ à jonction à canal N et à canal P en mettant en oeuvre une technologie CMOS ou bipolaire/CMOS
Examination procedure	01.05.1995	Examination requested [1995/26]
	29.10.1996	Despatch of a communication from the examining division (Time limit: M06)
	09.06.1997	Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time
	02.07.1997	Reply to a communication from the examining division
	04.02.1998	Despatch of communication of intention to grant (Approval: Yes)
	30.03.1998	Communication of intention to grant the patent
	25.06.1998	Fee for grant paid
	25.06.1998	Fee for publishing/printing paid
Opposition(s)	24.06.1999	No opposition filed within time limit [1999/37]
Request for further processing for:	02.07.1997	Request for further processing filed
	02.07.1997	Full payment received (date of receipt of payment) Request granted
	02.07.1997	Decision despatched
Fees paid	Renewal fee
	13.04.1995	Renewal fee patent year 03
	09.04.1996	Renewal fee patent year 04
	07.04.1997	Renewal fee patent year 05
	26.03.1998	Renewal fee patent year 06
Opt-out from the exclusive Tooltip competence of the Unified Patent Court	See the Register of the Unified Patent Court for opt-out data
	Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition Tooltip	FR	23.09.1998
	IT	23.09.1998
	[2008/05]
Former [2006/14]	FR	23.09.1998
Former [1999/36]	FR	19.02.1999
Documents cited:	Search	[X]US4403395 (CURRAN PATRICK A [US]) [X] 1-19 * abstract *;
		[X]DE2753704 (HOEFFLINGER BERND PROF DR RER) [X] 1-19 * page 6, paragraph 2; figure - *;
		[A]JPS6185855 ;
		[A]US4412238 (KHADDER WADIE N [US], et al) [A] 4,5,12-16 * abstract *;
		[A]JPS60258948 ;
		[A]JPS63292666 ;
		[A]EP0267882 (SGS MICROELETTRONICA SPA [IT]) [A] 9,15,16 * abstract *;
		[A]JPS6064475
		[X] - W.J.PODMIOTKO ET A.BAKOWSKI, "A MIXED CMOS-DMOS-JFET TECHNOLOGY FOR SWITCHING CIRCUITS WITH HIGH VOLTAGE OUTPUT STAGES", MICROELECTRONICS AND RELIABILITY, OXFORD GB, (1987), vol. 27, no. 1, pages 33 - 37, XP001625720 [X] 1-7 * abstract *
		[A] - PATENT ABSTRACTS OF JAPAN, (19860904), vol. 10, no. 259, Database accession no. (E - 434)<2315>, & JP61085855 A 19860501 (NEC CORP) [A] 1-7 * abstract *
		[A] - PATENT ABSTRACTS OF JAPAN, (19860514), vol. 10, no. 129, Database accession no. (E - 403), & JP60258948 A 19851220 (CLARION K.K.) [A] 9,10,15,16 * abstract *
		[A] - PATENT ABSTRACTS OF JAPAN, (19890327), vol. 13, no. 123, Database accession no. (E - 733)<3471>, & JP63292666 A 19881129 (NEC CORP) [A] 9,15,16 * abstract *
		[A] - PATENT ABSTRACTS OF JAPAN, (19850814), vol. 9, no. 197, Database accession no. (E - 335), & JP60064475 A 19850413 (FUJITSU K.K) [A] 10 * abstract *

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