EP0637076 - Electronic circuit assembly with improved heatsinking [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 06.07.2001 Database last updated on 13.07.2024 | Most recent event Tooltip | 06.07.2001 | No opposition filed within time limit | published on 22.08.2001 [2001/34] | Applicant(s) | For all designated states MOTOROLA, INC. 1303 East Algonquin Road Schaumburg, IL 60196 / US | [1995/05] | Inventor(s) | 01 /
Pollock, Randy L. 4604 Callisto Terrace Austin, Texas 78727 / US | 02 /
Anderson, George F. 40225 N. Schoolhouse Road Cave Creek, Arizona 85381 / US | [1995/05] | Representative(s) | Hudson, Peter David, et al Motorola European Intellectual Property Midpoint Alencon Link, Basingstoke Hampshire RG21 7PL / GB | [N/P] |
Former [1995/32] | Hudson, Peter David, et al Motorola European Intellectual Property Midpoint Alencon Link Basingstoke, Hampshire RG21 7PL / GB | ||
Former [1995/05] | Hudson, Peter David Motorola European Intellectual Property Midpoint Alencon Link Basingstoke, Hampshire RG21 1PL / GB | Application number, filing date | 94109904.6 | 27.06.1994 | [1995/05] | Priority number, date | US19930099670 | 29.07.1993 Original published format: US 99670 | [1995/05] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0637076 | Date: | 01.02.1995 | Language: | EN | [1995/05] | Type: | A3 Search report | No.: | EP0637076 | Date: | 30.08.1995 | Language: | EN | [1995/35] | Type: | B1 Patent specification | No.: | EP0637076 | Date: | 06.09.2000 | Language: | EN | [2000/36] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 14.07.1995 | Classification | IPC: | H01L23/367, H01L23/373 | [1995/05] | CPC: |
H01L23/3732 (EP,US);
H01L2224/48091 (EP,US);
H01L2224/49171 (EP,US);
H01L2924/19105 (EP,US)
| C-Set: |
H01L2224/48091, H01L2924/00014 (EP,US)
| Designated contracting states | DE, FR, GB [1995/05] | Title | German: | Elektronische Schaltungsanordnung mit verbesserter Hitzeableitung | [1995/05] | English: | Electronic circuit assembly with improved heatsinking | [1995/05] | French: | Assemblage de circuit électronique, comportant des moyens perfectionnés de dissipation thermique | [1995/05] | Examination procedure | 29.02.1996 | Examination requested [1996/17] | 14.11.1996 | Despatch of a communication from the examining division (Time limit: M04) | 24.03.1997 | Reply to a communication from the examining division | 07.08.1997 | Despatch of a communication from the examining division (Time limit: M04) | 17.12.1997 | Reply to a communication from the examining division | 29.07.1998 | Despatch of a communication from the examining division (Time limit: M04) | 04.12.1998 | Reply to a communication from the examining division | 10.09.1999 | Despatch of communication of intention to grant (Approval: Yes) | 12.01.2000 | Communication of intention to grant the patent | 25.04.2000 | Fee for grant paid | 25.04.2000 | Fee for publishing/printing paid | Opposition(s) | 07.06.2001 | No opposition filed within time limit [2001/34] | Fees paid | Renewal fee | 01.07.1996 | Renewal fee patent year 03 | 30.06.1997 | Renewal fee patent year 04 | 30.06.1998 | Renewal fee patent year 05 | 30.06.1999 | Renewal fee patent year 06 | 05.06.2000 | Renewal fee patent year 07 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [Y]EP0479205 (NORTON CO [US]) [Y] 1,2,6,7 * column A; figures 2-5,14 *; | [A]JPS61214455 ; | [A]EP0450968 (DE BEERS IND DIAMOND [ZA]) [A] 1-10 * column A *; | [A]FR2609841 (TOSHIBA KK [JP]) [A] 2 * figure 7 * | [Y] - "Cooling of Integrated Circuits Using Tape Automated Bonding", IBM TECHNICAL DISCLOSURE BULLETIN, NEW YORK US, vol. 33, no. 6A, pages 299 - 302 [Y] 1,2,6,7 * the whole document * | [A] - PATENT ABSTRACTS OF JAPAN, (19870217), vol. 11, no. 51, Database accession no. (E - 480), & JP61214455 A 00000000 (MITSUBISHI ELECTRIC) [A] 3,8,9 * abstract * | [A] - R.A. FOSTER ET AL., "Thermally Enhanced Package for Semiconductor Devices", IBM TECHNICAL DISCLOSURE BULLETIN, NEW YORK US, vol. 20, no. 7, pages 2637 - 2638 [A] 2 * the whole document * | Examination | EP0435603 | EP0392461 | JPS62149175 |