blank Quick help
blank Maintenance news

Scheduled maintenance

Regular maintenance outages:
between 05.00 and 05.15 hrs CET (Monday to Sunday).

Other outages
Availability

2022.02.11

More...
blank News flashes

News Flashes

New version of the European Patent Register – SPC proceedings information in the Unitary Patent Register.

2024-07-24

More...
blank Related links

Extract from the Register of European Patents

EP About this file: EP0655839

EP0655839 - Electronic system for terminating bus lines [Right-click to bookmark this link]
Former [1995/22]Electronic system, semiconductor integrated circuit and termination device
[2006/31]
StatusNo opposition filed within time limit
Status updated on  09.11.2007
Database last updated on 03.10.2024
Most recent event   Tooltip09.11.2007No opposition filed within time limitpublished on 12.12.2007  [2007/50]
Applicant(s)For all designated states
FUJITSU LIMITED
1015, Kamikodanaka, Nakahara-ku Kawasaki-shi
Kanagawa 211 / JP
[2007/01]
Former [1995/38]For all designated states
FUJITSU LIMITED
1015, Kamikodanaka, Nakahara-ku
Kawasaki-shi, Kanagawa 211 / JP
Former [1995/22]For all designated states
FUJITSU AUTOMATION LIMITED
1015, Kamikodanaka, Nakahara-ku
Kawasaki-shi, Kanagawa 211 / JP
Inventor(s)01 / Taguchi, Masao, c/o Fujitsu Limited
1015, Kamikodanaka, Nakahara-ku
Kawasaki-shi, Kanagawa 211 / JP
 [2005/44]
Former [1995/22]01 / Taguchi, Masao, c/o Fujitsu Limited
1015, Kamikodanaka, Nakahara-ku
Kawasaki-shi, Kanagawa 211 / JP
02 / Higuchi, Tsuyoshi, c/o Fujitsu Limited
1015, Kamikodanaka, Nakahara-ku
Kawasaki-shi, Kanagawa 211 / JP
Representative(s)Seeger, Wolfgang, et al
Seeger & Seeger
Patentanwälte & European Patent Attorneys
Georg-Hager-Strasse 40
81369 München / DE
[N/P]
Former [1995/22]Seeger, Wolfgang, Dipl.-Phys., et al
SEEGER & SEEGER Patentanwälte & European Patent Attorneys Georg-Hager-Strasse 40
D-81369 München / DE
Application number, filing date94118585.225.11.1994
[1995/22]
Priority number, dateJP1993029766929.11.1993         Original published format: JP 29766993
JP1994003047028.02.1994         Original published format: JP 3047094
JP1994003050128.02.1994         Original published format: JP 3050194
[1995/22]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0655839
Date:31.05.1995
Language:EN
[1995/22]
Type: A1 / A2 RE Reissue of A-publication
No.:EP0655839
Date:27.07.1995
[1995/38]
Type: A3 Search report 
No.:EP0655839
Date:17.07.1996
[1996/29]
Type: B1 Patent specification 
No.:EP0655839
Date:03.01.2007
Language:EN
[2007/01]
Search report(s)(Supplementary) European search report - dispatched on:EP28.05.1996
ClassificationIPC:H04L25/02, G06F13/40
[1995/50]
CPC:
H04L25/028 (EP,US); H03K19/00 (KR); G11C11/40 (KR);
H03K19/00384 (EP,US); H03K19/018571 (EP,US); H04L25/0278 (EP,US);
H04L25/0298 (EP,US); H04L25/0266 (EP,US); H04L25/0292 (EP,US) (-)
Former IPC [1995/22]H03K19/0175
Designated contracting statesDE,   FR,   GB,   IT [1995/22]
TitleGerman:Elektronisches System zum Abschluss von Busleitungen[2006/31]
English:Electronic system for terminating bus lines[2006/31]
French:Système électronique de terminaison des lignes de bus[2006/31]
Former [1995/22]Elektronisches System, Halbleiter-IC und Abschlussvorrichtung
Former [1995/22]Electronic system, semiconductor integrated circuit and termination device
Former [1995/22]Système électronique, circuit intégré semi-conducteur et dispositif de terminaison
Examination procedure07.01.1997Examination requested  [1997/11]
23.09.2003Despatch of a communication from the examining division (Time limit: M04)
30.10.2003Reply to a communication from the examining division
08.02.2005Despatch of a communication from the examining division (Time limit: M04)
07.06.2005Reply to a communication from the examining division
18.07.2005Despatch of a communication from the examining division (Time limit: M06)
18.01.2006Reply to a communication from the examining division
27.06.2006Cancellation of oral proceeding that was planned for 30.06.2006
30.06.2006Date of oral proceedings (cancelled)
19.07.2006Communication of intention to grant the patent
09.11.2006Fee for grant paid
09.11.2006Fee for publishing/printing paid
Divisional application(s)EP03025514.5  / EP1392028
EP05009867.2  / EP1564947
Opposition(s)05.10.2007No opposition filed within time limit [2007/50]
Fees paidRenewal fee
14.11.1996Renewal fee patent year 03
26.11.1997Renewal fee patent year 04
20.11.1998Renewal fee patent year 05
20.11.1999Renewal fee patent year 06
17.11.2000Renewal fee patent year 07
27.11.2001Renewal fee patent year 08
27.11.2002Renewal fee patent year 09
12.11.2003Renewal fee patent year 10
08.11.2004Renewal fee patent year 11
08.11.2005Renewal fee patent year 12
09.11.2006Renewal fee patent year 13
Opt-out from the exclusive  Tooltip
competence of the Unified
Patent Court
See the Register of the Unified Patent Court for opt-out data
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Documents cited:Search[A]US4871931  (FITZPATRICK MARK E [US], et al) [A] 60-99 * column A; figures 3,4 ** column 3, line 26 - line 53 *;
 [A]EP0492613  (NAT SEMICONDUCTOR CORP [US]) [A] 10,12-19 * column A * * page 3, line 53 - line 55; figure 4 *;
 [X]EP0533971  (SIEMENS AG [DE]) [X] 1,8,20-29,32-59 * figure . *;
 [A]US5227677  (FURMAN ANATOL [US]) [A] 1-9,11,20-59 * figures 1,4 * * column 3, line 46 - column 4, line 3 *;
 [XP]US5347177  (LIPP ROBERT J [US]) [XP] 1,4-9,11,20-59 * figures 1-4 * * column 4, line 48 - column 5, line 55 *;
 [XPA]WO9424797  (NAT SEMICONDUCTOR CORP [US]) [XP] 10 * abstract * [A] 12-19;
 [X]  - HANAFI ET AL., "DESIGN AND CHARACTERIZATION OF A CMOS OFF-CHIP DRIVER/RECEIVER WITH REDUCED POWER-SUPPLY DISTURBANCE", IEEE JOURNAL OF SOLID-STATE CIRCUITS, NEW YORK, US, (199205), vol. 27, no. 5, pages 783 - 790, XP002002101 [X] 1,8,20-29,32-39 * abstract * * page 786, column L, paragraph 2 - page 787, column L, paragraph 3 *

DOI:   http://dx.doi.org/10.1109/4.133169
ExaminationEP0420074
 EP0468583
 JPH04150731
 DE4142081
    - BARISH ET AL., "Active Terminator", IBM TECHNICAL DISCLOSURE BULLETIN, (197412), vol. 17, no. 7, page 1960
    - "Active Terminators for CMOS Drivers", IBM TECHNICAL DISCLOSURE BULLETIN, (198909), vol. 32, no. 4A, pages 393 - 395, XP000039912
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.