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Extract from the Register of European Patents

EP About this file: EP0661808

EP0661808 - Digital integrated circuits architecture [Right-click to bookmark this link]
StatusThe application is deemed to be withdrawn
Status updated on  01.08.1997
Database last updated on 31.01.2025
Most recent event   Tooltip20.11.1998Change - applicantpublished on 07.01.1999 [1999/01]
Applicant(s)For:DE  FR  GB  IT 
ALCATEL STANDARD ELECTRICA, S.A.
Ramirez de Prado, 5
28045 Madrid / ES
For:CH  LI  NL  SE 
ALCATEL N.V.
Burgemeester Elsenlaan 170
2288 BH Rijswijk / NL
[N/P]
Former [1999/01]For:DE  FR  GB  IT 
ALCATEL STANDARD ELECTRICA, S.A.
Ramirez de Prado, 5
28045 Madrid / ES
For:CH  LI  NL  SE 
ALCATEL N.V.
Burgemeester Elsenlaan 170
NL-2288 BH Rijswijk / NL
Former [1995/27]For:DE  FR  GB  IT 
ALCATEL STANDARD ELECTRICA, S.A.
Ramirez de Prado, 5/6
E-28045 Madrid / ES
For:CH  LI  NL  SE 
ALCATEL N.V.
Burgemeester Elsenlaan 170
NL-2288 BH Rijswijk / NL
Inventor(s)01 / Sanz Gomez, Rafael
Cava Alta 23, 3.
E-28005 Madrid / ES
02 / Ortiz Saenz, Fernando
Agustina de Aragon 10, 2. - 10
E-28006 Madrid / ES
03 / Merino Gonzalez, Jose Luis, Mondejar P - 1410
Parque de las Castillas, Arroyo de Valdemoro
E-19174 Torrejon del Rey (Guadalajara) / ES
04 / Gutierrez Serratosa, Maria del Mar
Paravicinos 3, 1.B
E-28039 Madrid / ES
[1995/27]
Representative(s)Pohl, Herbert, et al
Alcatel Alsthom, Intellectual Property Department, P.O. Box 30 09 29
70449 Stuttgart / DE
[N/P]
Former [1995/27]Pohl, Herbert, Dipl.-Ing, et al
Alcatel SEL AG Patent- und Lizenzwesen Postfach 30 09 29
D-70449 Stuttgart / DE
Application number, filing date94119370.808.12.1994
[1995/27]
Priority number, dateES1993000272330.12.1993         Original published format: ES 9302723
[1995/27]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0661808
Date:05.07.1995
Language:EN
[1995/27]
Type: A3 Search report 
No.:EP0661808
Date:22.05.1996
[1996/21]
Search report(s)(Supplementary) European search report - dispatched on:EP03.04.1996
ClassificationIPC:H03K3/012
[1995/27]
CPC:
H03K3/037 (EP); H03K3/012 (EP)
Designated contracting statesCH,   DE,   FR,   GB,   IT,   LI,   NL,   SE [1995/27]
TitleGerman:Architektur digitaler integrierter Schaltungen[1995/27]
English:Digital integrated circuits architecture[1995/27]
French:Architecture de circuits intégrés numériques[1995/27]
File destroyed:13.09.2003
Examination procedure23.11.1996Application deemed to be withdrawn, date of legal effect  [1997/38]
09.04.1997Despatch of communication that the application is deemed to be withdrawn, reason: examination fee not paid in time  [1997/38]
Fees paidPenalty fee
Penalty fee Rule 85b EPC 1973
16.01.1997M01   Not yet paid
Additional fee for renewal fee
31.12.199603   M06   Not yet paid
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Documents cited:Search[X]US4856035  (E. LEWIS) [X] 1-4 * column 3, line 66 - column 4, line 17; figure 1 *;
 [X]EP0552046  (SONY CORP.) [X] 1-4 * page 3, column 4, line 17 - page 5, column 5, line 17; figure 5 * * page 5, column 7, line 30 - column 8, line 7; figure 9 *;
 [A]US4630295  (S. KAMURO ET. AL.) [A] 1-4 * column 1, line 28 - line 55 * * column 2, line 16 - line 63; figure 2 *;
 [A]EP0335715  (SONY CORP.) [A] 1-4 * page 3, column 4, line 13 - page 4, column 5, line 60; figures 1-4 *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.