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Extract from the Register of European Patents

EP About this file: EP0642170

EP0642170 - Lateral bipolar transistor [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  09.10.1998
Database last updated on 16.09.2024
Most recent event   Tooltip09.10.1998No opposition filed within time limitpublished on 25.11.1998 [1998/48]
Applicant(s)For all designated states
CANON KABUSHIKI KAISHA
30-2, 3-chome, Shimomaruko, Ohta-ku
Tokyo / JP
[N/P]
Former [1995/10]For all designated states
CANON KABUSHIKI KAISHA
30-2, 3-chome, Shimomaruko, Ohta-ku
Tokyo / JP
Inventor(s)01 / Morishita, Masakazu, c/o Canon Kabushiki Kaisha
30-2, 3-chome, Shimomaruko
Ohta-ku, Tokyo / JP
[1995/10]
Representative(s)Beresford, Keith Denis Lewis, et al
Beresford Crump LLP
16 High Holborn
London WC1V 6BX / GB
[N/P]
Former [1995/10]Beresford, Keith Denis Lewis, et al
BERESFORD & Co. 2-5 Warwick Court High Holborn
London WC1R 5DJ / GB
Application number, filing date94203106.321.02.1991
[1995/10]
Priority number, dateJP1990004206622.02.1990         Original published format: JP 4206690
JP1990004206722.02.1990         Original published format: JP 4206790
JP1990004206822.02.1990         Original published format: JP 4206890
[1995/10]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0642170
Date:08.03.1995
Language:EN
[1995/10]
Type: A3 Search report 
No.:EP0642170
Date:09.08.1995
Language:EN
[1995/32]
Type: B1 Patent specification 
No.:EP0642170
Date:03.12.1997
Language:EN
[1997/49]
Search report(s)(Supplementary) European search report - dispatched on:EP26.06.1995
ClassificationIPC:H01L29/10, H01L29/735, H01L29/737
[1997/06]
CPC:
H01L29/1008 (EP,US); H01L29/0895 (EP,US); H01L29/165 (EP,US);
H01L29/735 (EP,US); H01L29/737 (EP,US)
Former IPC [1995/29]H01L29/73, H01L29/10
Former IPC [1995/10]H01L29/73
Designated contracting statesDE,   FR,   GB,   IT,   NL [1995/10]
TitleGerman:Lateraler Bipolartransistor[1995/10]
English:Lateral bipolar transistor[1995/10]
French:Transistor bipolaire latéral[1995/10]
Examination procedure21.12.1995Examination requested  [1996/08]
26.01.1996Despatch of a communication from the examining division (Time limit: M06)
05.08.1996Reply to a communication from the examining division
03.01.1997Despatch of communication of intention to grant (Approval: No)
26.05.1997Despatch of communication of intention to grant (Approval: later approval)
02.06.1997Communication of intention to grant the patent
06.08.1997Fee for grant paid
06.08.1997Fee for publishing/printing paid
Parent application(s)   TooltipEP91301383.5  / EP0443852
Opposition(s)04.09.1998No opposition filed within time limit [1998/48]
Fees paidRenewal fee
04.11.1994Renewal fee patent year 03
04.11.1994Renewal fee patent year 04
04.11.1994Renewal fee patent year 05
19.02.1996Renewal fee patent year 06
19.02.1997Renewal fee patent year 07
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Documents cited:Search[XY]  - R.L. THORNTON ET AL., IEEE TRANSACTIONS ON ELECTRON DEVICES, (198910), vol. 36, no. 10, pages 2156 - 2164, XP000095528 [X] 1-6 * figures 1-3 * [Y] 7,8

DOI:   http://dx.doi.org/10.1109/16.40895
 [Y]  - G.L. PATTON ET AL., 1989 SYPOSIUM ON VLSI TECHNOLOGY, (198905), pages 95 - 96 [Y] 7 * the whole document *
 [Y]  - P. VAN HALEN ET AL., IEEE TRANSACTIONS ON ELECTRON DEVICES, (198507), vol. ED-32, no. 7, pages 1307 - 1313 [Y] 8 * figure 2 *
Examination   - INTRODUCTION TO SOLID STATE PHYSICS, 3rd EDITION, KITTEL, J.WILEY & SONS, 1967, page 302
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.